Determination of well flat band condition in thin film FDSOI transistors using C-V measurement for accurate parameter extraction https://t.co/6djtGE7OZV #paper https://t.co/RYLH3fSGhg

Determination of well flat band condition in thin film FDSOI transistors using C-V measurement for accurate parameter extraction https://t.co/6djtGE7OZV #paper http://pic.twitter.com/RYLH3fSGhg

— Wladek Grabinski (@wladek60) November 21, 2017

from Twitter https://twitter.com/wladek60

November 21, 2017 at 11:54PM
via IFTTT

A 32 kb 9T near-threshold SRAM with enhanced read ability at ultra-low voltage operation https://t.co/R0t2mdhbMF #paper

A 32 kb 9T near-threshold SRAM with enhanced read ability at ultra-low voltage operation https://t.co/R0t2mdhbMF #paper

— Wladek Grabinski (@wladek60) November 21, 2017

from Twitter https://twitter.com/wladek60

November 21, 2017 at 11:18PM
via IFTTT

[mos-ak] [Final Program] 10th International MOS-AK Workshop in the Silicon Valley

10th International MOS-AK Workshop 

(co-located with the CMC Meeting and IEDM Conference) 

http://www.mos-ak.org/silicon_valley_2017/ 

Silicon Valley, December 6, 2017 

Final Program 

Together with local organization teams Cadence Design Systems and Keysight Technologies as well as International MOS-AK Board of R&D Advisers: Larry Nagel, Omega Enterprises Consulting (USA), Andrei Vladimirescu, UCB (USA); ISEP (FR) and all the Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Compact Modeling Workshop which will be organized for consecutive 10th time in the timeframe of coming IEDM and CMC Meetings.

Scheduled,10th subsequent MOS-AK modeling workshop organized in the Silicon Valley, aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and TCAD/EDA tool developers and vendors. The MOS-AK workshop program is available online:

<http://www.mos-ak.org/silicon_valley_2017/>

Venue: 

Cadence Design Systems 

2655 Seely Ave

San Jose, CA 95134

Building 5 (map)

Online Workshop Registration is still open

(any related inquiries can be sent to register@mos-ak.org)

Postworkshop Publications:

Selected best MOS-AK technical presentation will be recommended for further publication
in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee

WG211117

--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To post to this group, send email to mos-ak@googlegroups.com.
Visit this group at https://groups.google.com/group/mos-ak.
For more options, visit https://groups.google.com/d/optout.

Three-dimensional vertical Si nanowire MOS capacitor #model structure for the study of electrical versus... https://t.co/vekyZr5RmC

Three-dimensional vertical Si nanowire MOS capacitor #model structure for the study of electrical versus... https://t.co/vekyZr5RmC

— Wladek Grabinski (@wladek60) November 21, 2017

from Twitter https://twitter.com/wladek60

November 21, 2017 at 04:49PM
via IFTTT

Three-dimensional vertical Si nanowire MOS capacitor #model structure for the study of electrical versus geometrical Si nanowire characteristics https://t.co/OnvqDTh6l2

Three-dimensional vertical Si nanowire MOS capacitor #model structure for the study of electrical versus geometrical Si nanowire characteristics https://t.co/OnvqDTh6l2

— Wladek Grabinski (@wladek60) November 21, 2017

from Twitter https://twitter.com/wladek60

November 21, 2017 at 04:48PM
via IFTTT

#Banks are increasingly turning to #opensource projects. Here’s why. https://t.co/FHoU5O7jdZ

#Banks are increasingly turning to #opensource projects. Here’s why. https://t.co/FHoU5O7jdZ

— Wladek Grabinski (@wladek60) November 16, 2017

from Twitter https://twitter.com/wladek60

November 16, 2017 at 12:54PM
via IFTTT

Innovations in Electronics and Communication Engineering

Proceedings of the Fifth ICIECE 2016

Volume 7 of Lecture Notes in Networks and Systems

H. S. Saini, R. K. Singh, K. Satish Reddy

Springer, 8 Nov 2017 - Technology & Engineering - 596 pages

ISBN 9811038120, 9789811038129

The book contains high quality papers presented in the Fifth International Conference on Innovations in Electronics and Communication Engineering (ICIECE 2016) held at Guru Nanak Institutions, Hyderabad, India during 8 and 9 July 2016. The objective is to provide the latest developments in the field of electronics and communication engineering specially the areas like Image Processing, Wireless Communications, Radar Signal Processing, Embedded Systems and VLSI Design. The book aims to provide an opportunity for researchers, scientists, technocrats, academicians and engineers to exchange their innovative ideas and research findings in the field of Electronics and Communication Engineering [read more...]