Aug 31, 2011

Operation and Modeling of the MOS Transistor

Yannis Tsividis and Colin McAndrew


New to this edition:

  • Energy bands and the energy barrier viewpoint are integrated into the discussion in a smooth, simple manner
  • Expanded discussion of small-dimension effects, including velocity saturation, drain-induced barrier lowering, ballistic operation, polysilicon depletion, quantum effects, gate tunneling current, and gate-induced drain leakage
  • Expanded discussion of small-signal modeling, including gate and substrate current modeling and flicker noise
  • New chapter on substrate nonuniformity and structural effects, discussing transversal and lateral (halo) doping nonuniformity, stress and well proximity effects, and statistical variability
  • A completely re-written chapter on modeling for circuit simulation, covering the considerations and pitfalls in the development of models for computer-aided design
  • Extensively updated bibliography
  • An accompanying website includes additional details not covered in the text, as well as model computer code
ISBN-10: 0195170156 | ISBN-13: 978-0195170153 | Edition: 3

Jul 24, 2011

[mos-ak] Final Program MOS-AK/GSA ESSDERC/ESSCIRC Workshop in Helsinki on Sept.16 2011

Please visit the MOS-AK/GSA Helsinki web site with the final workshop
program:
http://www.mos-ak.org/helsinki/

* Free On-line Registration Form:
http://essderc2011.org/registration_form.php

* Venue: Finlandia Hall in Helsinki, Finland
http://www.essderc2011.org/venue.php

* Agenda: Sept. 16, 2011: 8:30 - 16:30
http://www.mos-ak.org/helsinki/
With panel discussion: "40th Anniversary of SPICE"
(panelists alphabetic list)
Narain D. Arora, Siltera, USA
Christian Enz, EPFL, CH
Chenming Hu, UC Berkeley, USA
Willy Sansen, ESAT-MICAS, B (moderator)
Andrei Vladimirescu, BWRC, UC Berkeley, USA
Andreas Wild, ENIAC - JU, EU

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Jul 18, 2011

Post Doctoral Researcher / Research Engineer Position in Compact Modeling

The BSIM Group of Electrical Engineering Department at the University of California Berkeley is seeking to hire a bright candidate interested in compact model development/maintenance to join as a post doctoral researcher or research engineer. We are looking for a candidate with PhD (for post doctoral researcher) or Masters (for Research Engineer) degree in EE/Physics preferably for long term (4–5 years). The responsibilities include but not limited to
  • Research and development of new BSIM compact models
  • Maintenance and support of BSIM MOSFET compact models (BSIM4, BSIMSOI and BSIM-MG)
  • Interface with industry to understand requirements and issues with BSIM models and rectify them
  • C & Verilog-A coding and testing/debugging of models
Required skills
  • Excellent semiconductor device physics and process technology knowledge
  • Experience in computer programming (C and Verilog-A)
  • Knowledge of basic analog and digital circuit operation
BSIM Group encourages its members to represent it actively at conferences, workshops, and meetings. Interested applicants should submit their CV to bsimgroup@gmail.com

For more information, please visit:
BSIM Group and Device Group

Jun 29, 2011

Arrays of indefinitely long uniform nanowires and nanotubes

Arrays of indefinitely long uniform nanowires and nanotubes

Nature Materials 10, 494–501 (2011)
doi:10.1038/nmat3038


http://www.nature.com/nmat/journal/v10/n7/full/nmat3038.html


It's frankly nice.... see one of their pictures (hope they don't get too upset!):

Jun 23, 2011

SISPAD 2011 Companion Workshops

September 7, 2011; Hotel Hankyu Expo Park, Osaka, Japan
  • Compact Modeling
    • Organizer: Sadayuki Yoshitomi, Toshiba Corporation
  • Power Devices
    • Organizer: Ichiro Omura, Kyusyu Institute of Technology