The first edition of the Training Courses on Compact Modeling (TCCM) will consist of a set of lectures addressing relevant topics in the compact modeling of advanced electron devices. Most of the courses will target compact modeling issues applicable to many electron devices. In particular, emphasis will be given on MOSFETs (bulk, SOI, Multi-Gate and High Voltage MOS structures) and HEMTs.
The Training Courses on Compact Modeling will be held in Tarragona (Catalonia, Spain) on June 30-July 1, in coordination with two other events partially or totally related to compact modeling: the 8th Graduate Student Meeting on Electronic Engineering (June 28-29) and the 3rd International Workshop on Compact Thin Film Transistor Modeling (July 2).
The Training Courses on Compact Modeling are sponsored by the FP7 “COMON” IAPP Project and the Universitat Rovira i Virgili in collaboration with the IEEE EDS Compact Modeling Technical Committee.
The Training Courses on Compact Modeling will be especially suited to researchers from both industry and academia working on electron device modeling, circuit and systems design and electronic design automated tools. In particular, the courses will be very interesting and useful to students working on these topics.
The General Chair Person is Prof. Benjamin Iñiguez, Universitat Rovira i Virgili, Tarragona, Spain.
The advanced registration fee will be 100 Euro for students and 130 Euro for non-students. After June 13, the registration fee is 150 Euro for students and 180 Euro for non-students. Members of the teams participating in the COMON project are exempted from paying the fee.
Topics:
A total of 10 lectures will be conducted. Tthe final programme, with the timetable, will be available soon.
1. Tibor Grasser (TU-Wien) - Transport modeling
2. Tor A Fjeldly (UniK, Norway) - Analytical 2D and 3D electrostatic modeling
3. Jamal Deen (McMaster University, Canada) - Noise modeling
4. Benjamin Iniguez (URV, Spain) - Analytical small-signal modeling
5. Ilcho Angelov (Chalmers University, Sweden) - High frequency device modeling
6. Renaud Gillon (On Semiconductor, Belgium) - Electro-thermal and reliability modeling
7. Sorin Cristoloveanu (MINATEC and LETI, France) - Electrical characterization of SOI and Multi-Gate MOSFETs
8. Asen Asenov (University of Glasgow) - Statistical variability and corresponding compact model strategies
9. Kiyoh Itoh (Hitachi, Japan) - "Variability-conscious Circuit Designs for Low-voltage Nano-scale CMOS LSIs"
10. Wladek Grabinski - "GNU/Open Source CAD Tools for Verilog-A Compact Model Standardization"
Apr 7, 2010
The Semiconductor Industry’s Nanoelectronics Research Initiative: Motivation and Challenges
Part-2 in the IEEE SCV Electron Devices Society (EDS) "Semiconductor Roadmap and Beyond" series.
Speaker: Dr. Jeffrey Welser, Director, SRC Nanoelectronics Research Initiative
Time: TUESDAY, Apr 13, 2010 6:00 PM - Pizza , 6:15 PM – Lecture
Cost: Free
Location: National Semiconductor, Building E1, Conference Center ,
2900 Semiconductor Drive , Santa Clara , CA 95051 .
See the NSC Building location map and directions
Contact: Sandeep Bahl
Apr 6, 2010
Alliance CAD System
Alliance CAD System is a free set of EDA tools and portable cell libraries for VLSI design. It covers the design flow from VHDL up to layout. It includes VHDL simulator, RTL synthesis, place and route, netlist extractor, DRC, layout editor: http://alliancecad.sourceforge.net
This project may now be found at http://www-asim.lip6.fr/recherche/alliance/.
Mar 25, 2010
IPL group releases PDK standard
What's next? Under this framework, OpenPDK will base its PDK technology on the OpenAcess database. It will also use several of the components developed by IPL: OA schematic symbols, component description format (CDF) and callbacks. For its part, Si2 will attempt to get the industry to develop standards around several other components: Spice models, tech files and DRC/LVS/LPE. [more]
Mar 22, 2010
Design, Test, Integration & Packaging of MEMS/MOEMS
DTIP 2010, 5-7 May 2010 , Seville, Spain
DTIP 2010 will be a follow-up to the very successful issues held in 1999 and 2000 in Paris and in 2001, 2002 and 2003 in Mandelieu-La Napoule, in 2004 and 2005 in Montreux, Switzerland in 2006, in 2007 in Stresa, Italy, in 2008 in Nice, France and in 2009 in Rome, Italy. This series of Symposia is a unique single-meeting event expressly planned to bring together participants interested in manufacturing microstructures and participants interested in design tools to facilitate the conception of these microstructures. Again, a special emphasis will be put on the very crucial needs of MEMS/MOEMS in terms of packaging solutions. The goal of the Symposium is to provide a forum for in-depth investigations and interdisciplinary discussions involving design, modeling, testing, micromachining, microfabrication, integration and packaging of structures, devices, and systems. The Symposium is sponsored by the IEEE Components, Packaging, and Manufacturing Technology Society and CMP.
DTIP 2010 will be a follow-up to the very successful issues held in 1999 and 2000 in Paris and in 2001, 2002 and 2003 in Mandelieu-La Napoule, in 2004 and 2005 in Montreux, Switzerland in 2006, in 2007 in Stresa, Italy, in 2008 in Nice, France and in 2009 in Rome, Italy. This series of Symposia is a unique single-meeting event expressly planned to bring together participants interested in manufacturing microstructures and participants interested in design tools to facilitate the conception of these microstructures. Again, a special emphasis will be put on the very crucial needs of MEMS/MOEMS in terms of packaging solutions. The goal of the Symposium is to provide a forum for in-depth investigations and interdisciplinary discussions involving design, modeling, testing, micromachining, microfabrication, integration and packaging of structures, devices, and systems. The Symposium is sponsored by the IEEE Components, Packaging, and Manufacturing Technology Society and CMP.
Download the call for participation.
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