CMRF 2007

The 2007 Workshop on Compact Modeling for RF/Microwave Applications (CMRF'07), organized in conjunction with the IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM2007) will be held on October 3 2007 in Boston, Massachussets.

CMRF 2007 is sponsored by the Delft Institute for Micro-electronics and Submicrontechnology and technically co-sponsored by the IEEE Electron Devices Society.

CMRF is focused on the compact modeling for RF and microwave applications, but not only of bipolar devices. Papers on RF and microwave FET devices can also be presented at CMRF. In fact, CMRF has become a very useful event to get a good picture of the state-of-the-art in this field, and discuss the new trends on compact modeling for RF and microwave applications of all types of devices.

The 2007 edition of CMRF will consist on four sessions: SiGe Compact Modeling, Analog Circuit Verification, III-V compact modeling, and Advanced Characterization and Modeling for RF Power Applications.


Besides, this year CMRF will include a meeting of experts from advanced SiGe technology and from III-V technology.

BCTM'07

The 2007 IEEE Bipolar and BiCMOS Circuits and Technology Meeting (BCTM2007) will be held in Boston, Massachussets, from September 30 to October 3 2007. The conference site will be the Marriot Long Wharf Hotel in Boston.

BCTM is the largest conference in bipolar and BiCMOS technologies and circuits, addressing fabrication, design, performance, testing and applications of bipolar and BiCMOS devices and circuits.


BCTM'07 will include three modeling sessions about bipolar devices: one large signal modeling session, one session about thermal effects, modeling and reliability, and one session about bipolar modeling and characterization. The power device session also incxludes one paper about compact thermal modeling.

In conjunction with BCTM'07, there will be a number of intersting BCTM short courses.

But for compact modeling researchers, the most interesting event held in conjunction with BCTM 2007 is the Workshop on Compact Modeling for RF/Microwave Applications, on October 3 2007.

BMAS 2007

The 2007 IEEE International Behavioral Modeling and Simulation Conference (BMAS 2007) will be held in San Jose, CA, on September 20-21, in conjunction with the 2007 Custom Integrated Circuits Conference (CICC), in the Doubletree Hotel in San Jose, at the heart of Silicon Valley.

BMAS addresses behavioral modeling and simulation for analog electronic circuits and systems. Topics include the development and application of behavioral languages and simulators, modeling practices and automatic extraction of models. Particular focus is placed on the Verilog-AMS and VHDL-AMS languages are of particular interest. The General Chair is Colin C. McAndrew (from Freescale Semiconductor), a recognized authority in the field of compact and behavioral modeling.

This year the BMAS program consists of several interesting sessions: applications of behavioral modeling, behavioral modeling tools, two sessions about behavioral models, and one poster and exhibit session.

Among the models presented in BMAS 2007, we can highlight a liquid crystall cell macro-model with Verilog-A, a SPICE model for piezoelectric transducers, a MEMS accelerometer model, a phase change memory model using Verilog-A, and a behavioral simulation of biological neuron systems using VHDL and VHDL-A.

For compact and behavioral modeling researchers, BMAS is no doubt a very interesting conference to attend, and for circuit designers, it is a very good complement to CCIC.

Paper on de-embedding RF FETs

In this month's issue of Electronics Letters, there is a paper titled "Simplified RF noise de-embedding method for on-wafer CMOS FET", by Xiong, Y.-Z. Issaoun, A. Nan, L. Shi, J. Mouthaan, K. . I think it is interesting enough for all those of you that are using measurements.

November 2007 issue of IEEE Transactions on Circuits and Systems, Part-I

This issue will be a special issue on circuits and computing architectures in the emerging area of Nanotechnology. Among other, I've found some papers that I think are worth a look:

Title: Modeling of the Electrical Conductivity of DNA
Authors: Vedrana Hodzic, Vildana Hodzic, Robert W. Newcomb

As they say in the abstract: "We have developed a PSpice model of the electrical behavior of DNA molecules for use in nanoelectronic circuit design. To describe the relationship between the current through DNA and the applied voltage we used published results of the direct measurements of electrical conduction through DNA molecules. The experimental dc current-voltage (I-V) curves show a nonlinear conduction mechanism as well as the existence of a temperature dependent semiconductive voltage gap. A weighted least-squares polynomial fit to the experimental data at one temperature, with fitted temperature dependent polynomial coefficient of the linear term, was used as a mathematical model of electrical behavior of DNA. An equivalent electrical circuit was created in PSpice in which DNA was modeled as a voltage-controlled current source described by the mathematical model that includes temperature dependence, GPOLY(T) . Using this model, PSpice simulations with this model generated current-voltage-curves at other temperatures that were in excellent agreement with experimental data"

Title: CNTFET Modeling and Reconfigurable Logic Circuit Design
Authors: Ian O'Connor, Junchen Liu, Frédéric Gaffiot, Fabien Prégaldiny, Christophe Lallement, Cristell Maneux, Johnny Goguet, Sebastien Frégonèse, Thomas Zimmer, Lorena Anghel, Trinh Dang, Régis Leveugle

This paper examines aspects of design technology required to explore advanced logic circuit design using CNTFET devices. An overview of current types of CNTFETs is given and highlights the salient characteristics of each. Compact modeling issues are addressed and new models are proposed implementing (i) a physics-based calculation of energy conduction sub-band minima to allow a realistic analysis of the impact of CNT helicity and radius on the dc characteristics and (ii) descriptions of ambipolar behavior in Schottky-Barrier CNTFETs and ambivalence in double-gate CNTFETs. Using the available models, the influence of the parameters on the device characteristics were simulated and analyzed. The exploitation of properties specific to CNTFETs to build functions inaccessible to MOSFETs is also described, particularly with respect to the use of double-gate CNTFETs in fine-grain reconfigurable logic.

Paper on Science

There is a paper on this month issue of Science from some people of IBM, stating that they have "seen" the dopant distribution in a nano-scale device. The point is, leaving apart the technique, that the dopant does not get an uniform distribution, even after annealing. See the paper: Imaging of Arsenic Cottrell Atmospheres Around Silicon Defects by Three-Dimensional Atom Probe Tomography, by Keith Thompson, Philip L. Flaitz, Paul Ronsheim, David J. Larson, and Thomas F. Kelly

IEEE Trans. on Electron Devices

This month's issue is a "Special Issue on Simulation and Modeling of Nanoelectronics Devices". That means that I will not look for papers, but I'll only say that all of them are quite interesting. There are papers on threshold voltage modeling, on modeling of statistical variations, on quantum effects,... So, have a look!