[mos-ak] MOS-AK/GSA Dresden workshop on-line publications

MOS-AK/GSA Dresden workshop on-line publications are available, visit: 

http://www.mos-ak.org/dresden/

The MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, held its annual spring workshop on April 26-27, 2012 at the Design Automation Division EAS of the Fraunhofer Institute for Integrated Circuits IIS in Dresden, Germany. More than 50 international academic researchers and modeling engineers attended four sessions to hear 16 technical compact modeling talks and poster presentations. The MOS-AK/GSA Modeling Working Group organized the event supported by Joachim Haase Fraunhofer IIS/EAS in Dresden, and a complementary X-FAB clean room visit, poster session and open networking event was hosted by Alexander Petr, X-FAB in Dresden.

As a result of an unfolded compact modeling discussion, the MOS-AK Group followed recommendation of Alexander Petr, X-FAB, a member of the Extended MOS-AK/GSA Compact Modeling Committee, to create a compact modeling open directory (CMOD:http://mos-ak.org/open_dir/). The directory will list available SPICE/Compact models including Verilog-A models for an extensive range of the semiconductor devices. The MOS-AK/GSA Group believes that the CMOD initiative will also stimulate further compact model developments for inter domain technologies and multidisciplinary applications.

The MOS-AK/GSA Dresden Press Note can be found here: 

http://www.gsaglobal.org/news/article.asp?article=2012/0507

and selected workshop photos are here:

http://mos-ak.org/dresden/photos.php

I hope, we would have a next chance to meet us with your academic and industrial partners at future MOS-AK/GSA modeling events (check the list below).

- with regards - WG (for the MOS-AK/GSA Committee) 

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MIXDES Special Modeling Sesion Warsaw (PL) May 24-26, 2012

COMON Tranining Course Tarragona (SP) June 28-19, 2012 

MOS-AK/GSA Bordeaux (F) Sept.21, 2012 

MOS-AK/GSA San Francisco, CA Q4 2012 

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Programme of the 2nd Training Course on Compact Modeling

The 2nd Training Course on Compact Modeling (TCCM) will be held in Tarragona (Catalonia, Spain) on June 28-29 2012.
 It will be organized by the NEPHOS Group, of the Department of Electronic, Electrical and Automatic Control Engineering at the Universitat Rovira i Virgili (Tarragona)..
The General Chairman is myself, Prof. Benjamin Iñiguez.

The Training Course on Compact Modeling will consist of l2 lectures addressing relevant topics in the compact modeling of advanced electron devices. These lectures will be conducted by top experts in the field. Most of the lectures will target compact modeling issues applicable to many electron devices. In particular, emphasis will be given on MOSFETs (bulk, SOI, Multi-Gate and High Voltage MOS structures) and HEMTs.
Attendees will  get very useful information on the different aspects of advenced device modelling. This training course is therefore recommended to Master and Ph D students, as well as postdocs and early stage researchers in companies, and not necessarily doing research on modelling.

Here is the final programme of the Training Course on Compact Modeling

8:30   Training Courses Opening Session            Benjamin Iniguez (Universitat Rovira i Virgili, Tarragona, Spain) 8:55  "Tunnel and quasi-ballistic transport modelling in nanoscale MOS devices".          Raphaël Clerc (Institut National Polytechnique de Grenoble, France) 11:15 Coffee break 11:40 "3D analytical modelling techniques for Tri-Gate MOS structures"             Romain Ritzenthaler (IMEC, Belgium) 12:50 "S-parameter and nonlinear RF modelling"             Franz Sischka (Agilent Technologies, Böblingen, Germany) 14:00   Lunch 15:15   "Low frequency noise modeling"             Frédéric Martinez (Université de Montpellier 2, France) 16:25 Quantum confinement models for nanoelectronic devices           David Jiménez (Universitat Autònoma de Barcelona, Spain) 20:30    Gala dinner    June 29 2012 8:45   "Thermal modelling of RF and microwave devices"         Giovanni Ghione (Politecnico di Torino, Italy) 9:55  "Statistical modelling techniques"         Colin C. McAndrew (Freescale Semiconductors, Phoenix, AZ, USA) 11:05  Coffee break   11:30 High frequency noise modeling           Jamal Deen (McMaster University, Canada) 12:50  "QucsStudio: A second generation Qucs software package for compact semiconductor device model development based on interactive and compiled equation-defined modelling techniques plus circuit simulation"            Mike Brinson (Metropolitan University of London, UK) 14:00   Lunch 15:15  "Flicker noise measurements and characterization"            Thomas Gneiting (AdMOS GmbH, Frickenhausen, Germany) 16:25 "World-wide Model Standardization at the CMC, and DRAM Modeling Needs"             Peter Lee (vice-chair of the Compact Modeling Council, Elpida Memory, Japan) Look at: http://compactmodelling.eu/tccm2_programme.php The Training Course on Compact Modeling is an event sponsored by the FP7 “COMON” (COmpact MOdelling Network) IAPP Project (which is coordinated by the Universitat Rovira i Virgili) in collaboration with the IEEE EDS Compact Modeling Technical Committee. Registration will be cheap, in particular before June 16 : http://compactmodelling.eu/tccm2_registration.php and will include lunches, coffee breaks and a Gala Dinner on June 28th.

[book] Lectures on the modeling elements of integrated circuits in microelectronics

Лекции по моделированию элементов интегральных схем микроэлектроники
Игорь Иванович Абрамов
ISBN: 978-3-8484-8201-6
LAP Lambert Academic Publishing (2012-04-11)

[mos-ak] MOS-AK/GSA India workshop on-line publications

MOS-AK/GSA India workshop on-line publications are available, 

visit: 

http://www.mos-ak.org/india/

The Workshop was co-organized by Indian National Academy of Engineering (INAE), supported by Ministry of Communication and IT (DIT), Government of India, Council of Scientific and Industrial Research (CSIR); Jaypee Institute of Information Technology (JIIT), Noida; with sponsorship provided by the microelectronic and semiconductor industry leaders: AMS, IBM, TI, STM, Cadence, Mentor Graphics and Masamb.

I would like to thank all MOS-AK/GSA speakers for sharing their compact modeling competence, R&D experience and delivering valuable MOS-AK/GSA presentations. I am sure, that our modeling event in Noida was a beneficial on to all the attendees as well as to all MOS-AK/GSA Group.

The MOS-AK India workshop press coverage is listed below

http://mos-ak.org/india/press.php

I hope, we would have a next chance to meet us with your academic and industrial partners at future MOS-AK/GSA modeling events (check the list below).

- with regards - WG (for the MOS-AK/GSA Committee) 

––––––––––––––––––––––––––––––––––---------------- 

MOS-AK/GSA Dresden April 26-27, 2012 

MIXDES Special Modeling Sesion Warsaw May 24-26, 2012 

MOS-AK/GSA Bordeaux Sept.21, 2012 

MOS-AK/GSA San Francisco Q4 2012 

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PhD course on Nano-scale MOS transistors

Semi-classical modeling and applications
Udine, May 28 - June 1, 2012

Luca Selmi, David Esseni, Pierpaolo Palestri
DIEGM, Università degli Studi di Udine

The course aims at giving a description (in terms accessible to both physicists and electronic engineers) of advanced models for modern nano-MOSFET architectures exploiting technology boosters (strain, high-k materials, etc.) for enhanced channel mobility and reduced leakage. The prerequisite knowledge in physics is limited to the basic concepts of classical electrostatics and electrodynamics and elementary notions of quantum mechanics.

All information dealing with the application for such a scholarship and the eligibility criteria can be found on
http://www.euro-dots.org/Students-rules.asp
and
http://www.euro-dots.org/Students-steps.asp

To register, please call +39 0432 558251 or e-mail it to palestri@uniud.it

DEADLINE FOR ADVANCED REGISTRATION: APRIL 28, 2012

4th Regional Seminar "Computer simulation and design of micro- nano- and microelectromechanical systems"

Natural Sciences Faculty FSEIHPE "State University - teaching, research and production complex"
Physics Department
Teaching and research laboratory instrument-technological modeling of micro-and nano-electronics 

March 30, 2012, Orel, Naugorskoe Av. 29

Seminar Program [translated by Google] 

1. S. Matyukhin ^1, Welcome to the participants
   ¹ State University-UNPK
2. ^A VO Turin, ² Zebra G.I.2 ³ Dorofeev, AA, Device-technological simulation of self-heating in GaN HEMT ,
   ^1-UNPK State University,
   ² NRNU "MiFi"
   ³ 3FGUP NPP "Pulsar"
3. ^A VO Turin, ² Zebra GI, ³ Inigez B3, ^4, Shur MS, Correct account of non-zero differential conductivity in a compact model of MOSFET in saturation due to self-heating effect and because korotkokanalnyh effects ,
   ^1-UNPK State University,
   ² NRNU "MiFi"
   ³ University of Rovira and Virginia, Spain,
   ⁴ Rensselaerovsky Polytechnic Institute, USA
4. Garanovich D. Drozdov, DG, EM Savchenko Design devices from electrostatic discharge protection for bipolar integrated circuits ,
   FSUE NPP "Pulsar"
5. Drozdov, DG, EM Savchenko, Siomko VO Study of models for the calculation of heterostructure transistors based on AlGaN / GaN
   FSUE NPP "Pulsar"
6. Siomko VO, Drozdov, DG, EM Savchenko, Research methods for calculating the breakdown voltage of transistors based on heterostructures AlGaN / GaN
   FSUE NPP "Pulsar"
7. A Kozil Z., S. Birner 2, 3 Dupuis, AR, Nextnano: device-technological modeling of transport in quantum well semiconductor lasers with a double restriction
   ^1-UNPK State University,
   ² Walter Schottky Institut, Technische Universität Munchen, Germany,
   ³ Matco Industries Inc., Scarborough, Ontario, Canada
8. Kozil Z., Differential resistance characteristics of the current-voltage characteristics of semiconductor lasers with a double restriction and optical efficiency
   State University-UNPK
9. Titushkin DA, Matyukhin SI, Modeling of electron-optical system, light-emitting diodes in the package Sentaurus TCAD software company Synopsys ,
   State University-UNPK
10. Makulevsky GR, Malyj DO, Matyukhin S., Investigation of the dependence of characteristics of RO DHS laser waveguide structure by taking into account the thermal effects ,
    State University-UNPK
11. Malyj DO, Makulevsky G.R, Matyukhin SI, Effect of heat on the electrical and optical characteristics of semiconductor lasers, DHS PO using the instrument-technological methods of modeling
    State University-UNPK
12. Tsyrlov AM, Cherkasov, MA, Technical requirements for analysis tools and simulation of high-power devices, switching equipment ,
    JSC «Proton»
13. Chernyshov, KN, Matyukhin S., Computer simulation of the diffusion technology of IGBT ,
    State University-UNPK
14. ^1.2 AA Pisarev, ^a Matyukhin SI, ² Stavtsev AV Computer simulation of the thyristor
    ^1-UNPK State University,
    ² ZAO "Proton-Electrotex"
15. ^A Stoudennikov AS, ^a Turin VO ² Tsyrlov AM, Compact modeling of silicon vertical MOSFET with double diffusion in the program Quite Universal Circuit Simulator
    ^1-UNPK State University,
    ² of "Proton"
16. ¹ Turin, VO, VV Ivanov ^{1, 2} Tsyrlov AM, ³ Martemyanov IS, Simulation of a silicon vertical MOSFET with double diffusion in the program Synopsys TCAD ,
    ^1-UNPK State University,
    ² of "Proton"
    ³ ETU "LETI" 

Job Offer for Compact Modeling (april, 2012)

Remember: we are only re-posting this information, and we're not related to the offer in any other form.

Device Modeling / Compact Modeling Lead / Manager

A top tier Research Group of Semiconductor MNC - Client of HanDigital - Bangalore (Bengaluru Area, India)

Job Description

• Manage and lead a strong technical team to effectively
• Develop compact models for FETs and passive devices like diodes, resistors, inductors , capacitors
• Design testsites and define test programs for RF/DCcharacterization
• Work closely with globally integrated team ofdevice modelers, technology developers and circuit designers
• Client interfacing to address concerns on device models, PDK or circuit performance.

Desired Skills & Experience

Experience : PhD with 10 to 12 Yrs / MS with 12 to 15 Yrs
 
Total Years of relevant experience :Minimum 5 or more years of experience in Device Modeling ; Hands-on experience with RF device / circuit design  and characterization.
 
Technical Knowhow required for the job

• Strong background in semiconductor device physics and characterization particularly in silicon platform is required
• Familiarity with industry standard BSIM or PSP models
• Experience with EDA tools like Cadence, Spectre, HSpice and ADS

Additional Details :

• Excellent written & oral communication skills
• Excellent Technical leadership skills
• Direct working experience with foundries ( Desired ,  Not a Mandatory )

Company Description

Our client is Bangalore based research center is responsible for the definition and development of industry leading technologies such as Copper Interconnect, Silicon onInsulator (SOI), High-Performance Logic-Based Embedded DRAM technologies, and SiGe for RF and analog applications, and high-k material technologies.
 
The research group is also the leading organization in defining the most advanced technologies forthe 45 nm and 22 nm nodes, including research in various aspects of Lithography, strained silicon, and Magnetic RAM (MRAM). The research center develops all of semiconductor technologies including SOI, Bulk CMOS, RFCMOS, HVCMOS,SiGe HBT BiCMOS, and nanodevice technologies.

Additional Information

Posted:

April 5, 2012

Type:

Full-time

Experience:

Mid-Senior level

Functions:

Research, Engineering, Design 

Industries:

Semiconductors 

Compensation:

Best in the Industry

Referral Bonus:

• Applicable

Employer Job ID:

Device / Compact Modeling Manager

Job ID:

2815431