Jun 24, 2020

[paper] SPICE Model for Bipolar Resistive Switching Devices

Miranda, Enrique, and Jordi Suñé
Departament d’Enginyeria Electrònica,
UAB, 08193 Barcelona, Spain
Fundamentals and SPICE Implementation of the Dynamic Memdiode Model
for Bipolar Resistive Switching Devices
(2020 - techrxiv.org)

Abstract: This paper reports the fundamentals and SPICE  implementation of the dynamic memdiode model (DMM) for the  conduction characteristics of bipolar resistive switching (RS)  devices. Following Chua’s memristive devices theory, the  memdiode model comprises two equations, one for the electron  transport based on a heuristic extension of the quantum pointcontact model for filamentary conduction in dielectrics and a  second equation for the internal memory effect related to the  reversible displacement of atomic species within the oxide film.  The DMM represents a breakthrough with respect to the previous  quasi-static memdiode model (QMM) since it describes the  memory state of the device as a rate balance equation  incorporating both the snapback and snapforward effects,  features of utmost importance for the accurate and realistic  simulation of the RS phenomenon. The DMM allows simple setting  of the memory state initial condition as well as separate modeling  of the set and reset transitions. The model equations are  implemented in the LTSpice simulator using an equivalent  circuital approach with behavioral components and sources. The  practical details of the model implementation and its use are  thoroughly discussed.   
Fig: Hysteretic behavior of the filamentary-type I-V characteristic.
Filament stages: A) formation, high resistance state (HRS), B) completion, C) expansion,
D,F) complete expansion, low resistance state (LRS), G) dissolution, I) rupture.

Supplementary information: The memdiode model script for LTSpice XVII reported in this Appendix includes not only the DMM but also the QMM. It is important to activate one of the options at a time (DMM or QMM) by inserting asterisks (*) in the corresponding lines. The parameter list, I-V, and Auxiliary functions sections are common to both approaches. This does not mean that the obtained curves will be identical. The meaning of the parameters is discussed in the text and in previous papers.

LTSPICE script
.subckt memdiode + - H
*created by E.Miranda & J.Suñé, June 2020
.params
+ H0=0 ri=50
+ etas=50 vs=1.4
+ etar=100 vr=-0.4
+ imax=1E-2 amax=2 rsmax=10
+ imin=1E-7 amin=2 rsmin=10
+ vt=0.4 isb=200E-6 gam=1 gam0=0 ;isb=1/gam=0 no SB/SF
+ CH0=1E-3 RPP=1E10 I00=1E-10
*Dynamic model
BV A 0 V=if(V(+,-)>=0,1,0)
RH H A R=if(V(+,-)>=0,TS(V(C,-)),TR(V(C,-)))
CH H 0 1 ic={H0}
*Quasi-static model
*BH 0 H I=min(R(V(C,-)),max(S(V(C,-)),V(H))) Rpar=1
*CH H 0 {CH0} ic={H0}
*I-V
RE + C {ri}
RS C B R=RS(V(H))
BD B - I=I0(V(H))*sinh(A(V(H))*V(B,-))+I00
RB + - {RPP}
*Auxiliary functions
.func I0(x)=imin+(imax-imin)*limit(0,1,x)
.func A(x)=amin+(amax-amin)*limit(0,1,x)
.func RS(x)=rsmin+(rsmax-rsmin)*limit(0,1,x)
.func VSB(x)=if(x>isb,vt,vs)
.func ISF(x)=if(gam==0,1,pow(limit(0,1,x),gam)-gam0)
.func TS(x)=exp(-etas*(x-VSB(I(BD))))
.func TR(x)= exp(etar*ISF(V(H))*(x-vr))
.func S(x)=1/(1+exp(-etas*(x-VSB(I(BD)))))
.func R(x)=1/(1+exp(-etar*ISF(V(H))*(x-vr)))
.ends

Acknowledgements: This work was funded by the WAKeMeUP 783176 project, co‐ funded by grants from the Spanish Ministerio de Ciencia, Innovación y Universidades (PCI2018‐093107 grant) and the ECSEL EU Joint Undertaking and by project TEC2017-84321- C4-4-R funded by the Spanish Ministerio de Ciencia, Innovación y Universidades. Dr. G. Patterson and Dr. A. Rodriguez are greatly acknowledged for their contributions to the development of the ideas reported in this work


Jun 23, 2020

Webinar Series by Distinguished Experts

 
 The National Academy of Sciences, India (NASI)
- Delhi Chapter-
and
 
 MHRD-Institution Innovation Council (IIC)
Deen Dayal Upadhyaya College Chapter
(University of Delhi)
Under the aegis of DBT Star College Program
 
Jointly Organizes
Webinar Series by Distinguished Experts
 June 25, 2020 @ 10 am Indian Standard Time
Printed and Flexible Electronics and Devices
Dr. Jin-Woo Han
Research Scientist, Center for Nanotechnology,
NASA Ames Research Center, Moffett Field, California, USA
 
July 03, 2020 @ 04:30 pm Indian Standard Time
New chemistry and physics in magnetic oxides
Prof. J. Paul Attfield, FRS FRSE FRSC, Foreign Fellow INSA
Professor of Materials Science at Extreme Conditions
School of Chemistry, Centre for Science at Extreme Conditions,
The University of Edinburgh, Edinburgh
 July 09, 2020 @ 06:30 pm Indian Standard Time
Prof. Katepalli Sreenivasan, Foreign Fellow INSA
Dean Emeritus of NYU Tandon School of Engineering;
The Eugene Kleiner Professor for Innovation in Mechanical Engineering;
Professor of Physics (Faculty of Arts and Science);
Mathematics (Courant Institute of Mathematical Sciences)
 

July 10, 2020 @ 01:30 India Standard Time
Can Future Energy Needs be met Sustainably?
Prof. Sir Chris Llewellyn Smith, FRS, FAPS (USA), Honorary Fellow, IOP (UK), Foreign Fellow INSA(India)
Rudolf Peierls Centre for Theoretical Physics
Parks Road, Oxford OX1 3PU
 July 11, 2020 @ 03:30 pm Indian Standard Time
Are we there yet? How do cells find their way?
Prof. Philip K. Maini, FRS, FIMA, FRSB, FMedSci, Foreign Fellow INSA (India)
Wolfson Centre for Mathematical Biology
Mathematical Institute, Andrew Wiles Building, Radcliffe Observatory Quarter
Woodstock Road, Oxford
 July 14, 2020 @ 04:30 pm Indian Standard Time
The influence of infection on Society before Covid19
Prof. Sir Peter Julius Lachmann, FRS, FRCP, FRCPath, FMedSci, Foreign Fellow INSA(India)
Fellow, Emeritus Sheila Joan Smith Professor of Immunology
Christ College, University of Cambridge
No registration fee to attend the Lecture. However, all interested should register via Google form on or before June 22, 2020 to attend the lectures via CISCO Webex/Google Meet. Link for Google form:

Organizer: Prof. Ajoy Ghatak, Chairperson - NASI Delhi Chapter & Prof. Anurag Sharma, Secretary - NASI Delhi Chapter
Coordinator:
Dr. Manoj Saxena, MNASc and Executive Committee Member-NASI Delhi Chapter
Associate Professor, Deptt. of Electronics, Deen Dayal Upadhyaya College, University of Delhi, New Delhi
Dr. Geetika Jain Saxena, Associate Professor, Department of Electronics, Maharaja Agrasen College, University of Delhi, New Delhi

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Jun 22, 2020

[paper] “Extrinsic” Compact Model of the MOSFET Drain Current

V. O. Turin, R. S. Shkarlat, G. I. Zebrev, B. Iñiguez and M. S. Shur
The “Extrinsic” Compact Model of the MOSFET Drain Current Based on a New Interpolation Expression for the Transition Between Linear and Saturation Regimes with a Monotonic Decrease of the Differential Conductance to a Nonzero Value
2020 4th IEEE EDTM, Penang, Malaysia
2020, pp. 1-4
doi: 10.1109/EDTM47692.2020.9117810

Abstract: Previously, we proposed a new interpolation expression to bridge the transition between the linear and the saturation regimes of “intrinsic” MOSFET. This approach, in contrast to the traditional one, gives a monotonic decrease of the differential conductance from the maximum value in the linear regime to the minimum value in the saturation regime. Later, we proposed a linear approximation for an “extrinsic” MOSFET drain current dependence on the “extrinsic” drain bias in the saturation regime for not very high drain bias when nonlinear effects can be neglected. To obtain this approximation, an equation for the output differential resistance of the “extrinsic” MOSFET in saturation regime was obtained, that is similar to the result known from the theory of the common source MOSFET amplifier with source degeneration. In this paper, we combine these two results and present an “extrinsic” compact model for a short-channel MOSFET above threshold drain current with proper account of the differential conductance in the saturation regime.



[paper] Analog/RF Tri-metal Gate FinFET

N. G. P, S. Routray and K. P. Pradhan
Assessment of Analog/RF performances for 10 nm Tri-metal Gate FinFET
2020 4th IEEE EDTM; 2020, pp. 1-4
Penang, Malaysia
DOI: 10.1109/EDTM47692.2020.9117846

Abstract: Reduction in parasitic capacitance and resistance in FinFET is quite necessary in order to achieve high performance. In this paper, an intensive study on structural advancement in three different ways is implemented in basic FinFET structure such as (a) addition of thin silicide layer as interfacial layer between the contact and source/drain (b) extended and elevated source/drain (c) addition of hybrid spacer. Additionally, comparative study on the analog and RF performance is performed and analyzed for this structure between single material gate (SMG) and tri material gate (TMG) FinFET with all above enhancements. The analog parameters that have been analyzed are transconductance (gm), transconductance generation factor (TGF), output conductance (gd), and intrinsic gain (gm/gd). Similarly, the RF parameters like gate capacitance (CGG), cut-off frequency (fT), transconductance frequency product (TFP), gain frequency product (GFP), and gain transconductance frequency product (GTFP) are reported. Even though there is a degradation in the mobility for the TMG FinFET, but on a whole provides better performance. Furthermore, the effect of temperature on the drain current and transconductance has been shown for the TMG structure by varying the temperature from 200 to 350K with intervals of 50K which would be the extension to this paper. Analysis gives a potential overview on different structural improvement in order to achieve higher performance.
Fig. I. Top view of the proposed FinFET structure

Fig. II. (a) Gate capacitance (b) cutoff frequency (c) intrinsic delay (d) TFP (e) GFP (f) GTFP plots by variation of gate material.