Student group works on designs for a fully integrated wireless receiver

The group, known as the Microelectronics Students’ Group, has quickly captivated new members and is now composed of more than 20 students. They are presently working towards the design of a fully integrated wireless receiver in sub-micron CMOS.

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Job offer for Modelling Engineer

I copy a job offer I found:

EM Modeling Engineer

Company: Peregrine Semiconductor
Location: San Diego, CA
Please submit resumes to kfedder@psemi.com

Job Description:

Responsible for device and package modeling of Peregrine’s patented high-performance UltraCMOSTM silicon-on-sapphire CMOS process technology. Job functions include: Package model development, RF passive model development, parasitic analysis, test hardware/software setup, statistical modeling, model implementation on multiple EDA platforms. The candidate will work closely with senior modeling engineers to provide a comprehensive set of models to our design engineers as well as foundry customers.



Qualifications:

Education Desired and Experience
PhD in Electrical Engineering or MSEE with 5 years experience in EM modeling.
Must have knowledge base in the following areas:
Strong understanding of electromagnetic theory.
Understanding of transmission line theory.
Experience using SPICE like circuit simulators.
Experience using EM simulators (HFSS, Sonnet, IE3D).
Basic understanding of semiconductor manufacturing.
Basic understanding of semiconductor packaging.
Demonstrated ability developing automation scripts using MATLAB, Perl, MathCad, UNIX scripting, etc.
Knowledge in one or more of the following areas is highly desirable:
EM simulation on semiconductor substrates
Package model or RF model development.
Large signal device or circuit characterization and modeling
Monte Carlo/ statistical modeling
Layout optimization for RF applications
Understanding of the following tools or similar:
Cadence Design System (Virtuoso, Analog Artist, Assura, etc)
Agilent Design System (ADS, Momentum, RFDE)
MATLAB, Perl, IC-CAP
Good written and oral communication skills.
Must be able to work well in a team environment.

Controllable Molecular Modulation of Conductivity in Silicon-Based Devices

Tao He^†, David A. Corley^†, Meng Lu^†, Neil Halen Di Spigna^‡, Jianli He^†, David P. Nackashi^‡, Paul D. Franzon^‡ and James M. Tour^†

J. Am. Chem. Soc., 2009, 131 (29), pp 10023–10030

Abstract:

The electronic properties of silicon, such as the conductivity, are largely dependent on the density of the mobile charge carriers, which can be tuned by gating and impurity doping. When the device size scales down to the nanoscale, routine doping becomes problematic due to inhomogeneities. Here we report that a molecular monolayer, covalently grafted atop a silicon channel, can play a role similar to gating and impurity doping. Charge transfer occurs between the silicon and the molecules upon grafting, which can influence the surface band bending, and makes the molecules act as donors or acceptors. The partly charged end-groups of the grafted molecular layer may act as a top gate. The doping- and gating-like effects together lead to the observed controllable modulation of conductivity in pseudometal− oxide−semiconductor field-effect transistors (pseudo-MOSFETs). The molecular effects can even penetrate through a 4.92-μm thick silicon layer. Our results offer a paradigm for controlling electronic characteristics in nanodevices at the future diminutive technology nodes.

DOI: 10.1021/ja9002537

The International Winter School: Beyond Moore’s Law, 2010 (BML2)

The BML2 will be held in the Suites Hotel in Jeju island, Korea during the period of February 1-5, 2010. Jeju island is located at the southern end of the South Korea and is famous for its beautiful landscape and mild whether.

Recognizing the inevitability of the ultimate limit to the "downsizing" of Si feature size within the next 5 to 10 years (or the end of "Moore's Law"), as well as the ever-increasing need for denser, faster and less dissipative logic, memory and sensors, this school will examine several promising new nanoelectronic technologies that appear to respond to this need. To this end, the sponsoring agencies from Korea, Taiwan and the US have assembled an international group of distinguished lecturers who will provide guidance through formal lectures, as well as via informal workshops in which the attendees can ask questions and interact with those same lecturers. It is hoped that the school will help guide the selected attendees to follow careers in these emerging research areas and to become future leaders in advancing the field of information technology. The school also may help in establishing relations between young scientists from other countries, relations that it is hoped may lead to future international collaboration.

Detailed information regarding the venue and travel to the conference site can be found in the official website of the Winter School.

[mos-ak] Final Program: MOS-AK Workshop in Baltimore

--- The Final MOS-AK/Baltimore Workshop program is available on-line:
http://www.mos-ak.org/baltimore/

--- Workshop location:
* Johns Hopkins University at Homewood Campus in the Computational
Sciences and Engineering
* Building (CSEB) Room CSEB 17
* <http://webapps.jhu.edu/jhuniverse/information_about_hopkins/
visitor_information/>

--- No registration fee thanks to our organizers and sponsors.
To help our local organizers with local logistic and other
arrangements, we would suggest to register on-line
http://www.mos-ak.org/baltimore/register.php

--- MOS-AK/Baltimore Committee:
* Andreas G. Andreou, JHU; Technical Program Chair
* Pekka Ojala, Exar; MOS-AK/GSA WG North America Chair
* Gilson I Wirth; UFRGS; MOS-AK/GSA WG South America Chair
* Ehrenfried Seebacher, austriamicrosystems AG; MOS-AK/GSA WG
Europe Chair
* Chelsea Boone GSA; Senior Research Analyst
* Darryl Leavitt, GSA; Director of Events
* Wladek Grabinski, GMC Suisse; MOS-AK/GSA Workshop Manager

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