The Semiconductor Industry’s Nanoelectronics Research Initiative: Motivation and Challenges

Part-2 in the IEEE SCV Electron Devices Society (EDS) "Semiconductor Roadmap and Beyond" series.

Speaker: Dr. Jeffrey Welser, Director, SRC Nanoelectronics Research Initiative

Time: TUESDAY, Apr 13, 2010 6:00 PM - Pizza , 6:15 PM – Lecture

Cost: Free
Location: National Semiconductor, Building E1, Conference Center ,
2900 Semiconductor Drive , Santa Clara , CA 95051 .
See the NSC Building location map and directions
Contact: Sandeep Bahl

Web link: http://www.ewh.ieee.org/r6/scv/eds/

Alliance CAD System

Alliance CAD System is a free set of EDA tools and portable cell libraries for VLSI design. It covers the design flow from VHDL up to layout. It includes VHDL simulator, RTL synthesis, place and route, netlist extractor, DRC, layout editor: http://alliancecad.sourceforge.net

This project may now be found at http://www-asim.lip6.fr/recherche/alliance/.