Article in EDN: Modeling gaps in state-of-the-art mixed-signal SOC design

I've recently found an old (2006) paper on the EDN: Electronics Design, Strategy, News website. (I cannot reproduce it here because of the copyrights).

They discuss a bit about standardization efforts on Compact Modeling, and the different aspects that must be taken into account. I think it is a nice paper, even though it is slightly biased towards BSIM (only a bit: PSP, EKV and HiSIM are also mentioned... but not so extensively....).

Papers in Volume 52, Issue 5, Pages 597-838 (May 2008) of Solid-State Electronics

It seems that this month's harvest has been quite good. There are some quite interesting papers

Low-frequency noise properties of double channel AlGaN/GaN HEMTs
S.K. Jha, C. Surya, K.J. Chen, K.M. Lau and E. Jelencovic

A fully 2-dimensional, quantum mechanical calculation of short-channel and drain induced barrier lowering effects in HEMTs
G. Krokidis, J.P. Xanthakis and N.K. Uzunoglu

Subthreshold characteristics of polysilicon TFTs
Wanling Deng, Xueren Zheng, Rongsheng Chen and Yuan Liu

Physics-based 1/f noise model for MOSFETs with nitrided high-κ gate dielectrics
Tanvir Hasan Morshed, Siva Prasad Devireddy, Zeynep Çelik-Butler, Ajit Shanware, Keith Green, J.J. Chambers, M.R. Visokay and Luigi Colombo

Modeling non-quasi-static effects in channel thermal noise and induced-gate noise in MOS field-effect transistors
Abhay Deshpande and R.P. Jinda

Mobility model for compact device modeling of OTFTs made with different materials
M. Estrada, I. Mejía, A. Cerdeira, J. Pallares, L.F. Marsal and B. Iñiguez

Hot-carrier effects as a function of silicon film thickness in nanometer-scale SOI pMOSFETs
Sung Jun Jang, Dae Hyun Ka, Chong Gun Yu, Won-Ju Cho and Jong Tae Park

Modeling of potentials and threshold voltage for symmetric doped double-gate MOSFETs
A. Cerdeira, O. Moldovan, B. Iñiguez and M. Estrada