In 2008 DCIS (Conference on Design of Circuits and Integrated Systems) will take place in Grenoble, in France, on November 12-14 2008. It will be organized by the TIMA Laboratory.
DCIS was originally the top Spanish Conference on Circuit Design. However, more than 10 years ago it became an international conference. Although often held in Spain it has also been organized in other countries not far from Spain, such as Portugal or France.
The Call for Papers mentions all topics related to Integrated Circuit and Systems Design. As usual, modeling is included among the topics.
The submission deadline is April 4 2008.
Grenoble and its vicinity is a very nice place for sightseeing, offering many opportunities for outdoor: mountain trails to hike, historic buildings to see, old streets to walk along, and even skiing in the highest mountains in November.
Feb 12, 2008
New modeling papers in Solid-State Electronics
The February 2008 issue of Solid-State Electronics includes several interesting papers on compact modeling of different devices.
"A new analytical compact model for two-dimensional finger photodiodes", by T. Naeve et al
"An analytical threshold voltage model for graded channel asymmetric gate stack (GCASYMGAS) surrounding gate MOSFET", by H. Kaur et al
"Extraction of series resistance using physical mobility and current models for MOSFETs", by H. Katto
"An explicit surface-potential-based model for undoped double-gate MOSFETs", by J. F. Gong et al
"An efficient channel segmentation approach for a large-signal NQS MOSFET model" by M. Bucher and A. Bazigos. This is a very interesting paper presenting an adequate technique to extend a compact Quasi-Static model to the RF operation.
I also recommend the following paper for reading (it is modeling of balistic devices although not compact modeling)
"Modeling the effects of the channel electron velocity on the channel surface potential of ballistic MOSFETs", by L. F. Mao
And there is a very interesting paper studying the capacitance characteristics of pentacene TFTs:
"Quasi-static capacitance–voltage characterizations of carrier accumulation and depletion phenomena in pentacene thin film transistors", by Y. M. Chen et al
The January issue of Solid State Electronics included a quite interesting paper by Huaxin Lu, Bo Yu and Yuan Taur, presenting a unified charge modelling formulation valid for both Double-Gate and Surrounding Gate MOSFETs:
"A unified charge model for symmetric double-gate and surrounding-gate MOSFETs", by Huaxin Lu, Bo Yu and Yuan Taur
A few compact modeling papers were also published in the December issue of Solid-State Electronics:
First of all, a compact model for power MOSFETs:
"An EKV-based high voltage MOSFET model with improved mobility and drift model", by Yogesh Singh Chauhan, Renaud Gillon, Benoit Bakeroot, Francois Krummenacher, Michel Declercq and Adrian Mihai Ionescu
And finally, a paper presenting an industrial view of compact modeling, indicating some special requirements that are important when developing physics-based compact models:
"An industrial view on compact modeling", by Reinout Woltjer, Luuk Tiemeijer and Dick Klaassen
"A new analytical compact model for two-dimensional finger photodiodes", by T. Naeve et al
"An analytical threshold voltage model for graded channel asymmetric gate stack (GCASYMGAS) surrounding gate MOSFET", by H. Kaur et al
"Extraction of series resistance using physical mobility and current models for MOSFETs", by H. Katto
"An explicit surface-potential-based model for undoped double-gate MOSFETs", by J. F. Gong et al
"An efficient channel segmentation approach for a large-signal NQS MOSFET model" by M. Bucher and A. Bazigos. This is a very interesting paper presenting an adequate technique to extend a compact Quasi-Static model to the RF operation.
I also recommend the following paper for reading (it is modeling of balistic devices although not compact modeling)
"Modeling the effects of the channel electron velocity on the channel surface potential of ballistic MOSFETs", by L. F. Mao
And there is a very interesting paper studying the capacitance characteristics of pentacene TFTs:
"Quasi-static capacitance–voltage characterizations of carrier accumulation and depletion phenomena in pentacene thin film transistors", by Y. M. Chen et al
The January issue of Solid State Electronics included a quite interesting paper by Huaxin Lu, Bo Yu and Yuan Taur, presenting a unified charge modelling formulation valid for both Double-Gate and Surrounding Gate MOSFETs:
"A unified charge model for symmetric double-gate and surrounding-gate MOSFETs", by Huaxin Lu, Bo Yu and Yuan Taur
A few compact modeling papers were also published in the December issue of Solid-State Electronics:
First of all, a compact model for power MOSFETs:
"An EKV-based high voltage MOSFET model with improved mobility and drift model", by Yogesh Singh Chauhan, Renaud Gillon, Benoit Bakeroot, Francois Krummenacher, Michel Declercq and Adrian Mihai Ionescu
And finally, a paper presenting an industrial view of compact modeling, indicating some special requirements that are important when developing physics-based compact models:
"An industrial view on compact modeling", by Reinout Woltjer, Luuk Tiemeijer and Dick Klaassen
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