[mos-ak] [Summary] Spring MOS-AK Workshop in London

 MOS-AK Compact Modeling Workshop

 London Metropolitan University

 March 28-29, 2014 London

 

The MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, delivered its annual spring compact modeling workshop on March 28-29, 2014 at London Metropolitan University. The event received full sponsorship from leading industrial partners including Agilent Technologies, MOSIS Services and Tanner EDA. The technical MOS-AK program promoters included Eurotraining, IET, IEEE UKRI Section as well as EDA Solutions. More than 40 registered academic researchers and modeling engineers attended two sessions to hear 9 technical compact modeling presentations including the QUCS Tutorial by Prof. Mike Brinson.

 

The workshop summary has been posted thru the semiwiki.com blog and all the MOS-AK presentations are available for downloads here.

 

The MOS-AK/GSA Modeling Working Group is coordinating several upcoming modeling events to focus on the Verilog-A compact model standardization as well as open source circuit simulation tool developments: 

• 3rd Training Course on Compact Modelling, TCCM, Lublin (PL), June 18, 2014
  
• a special compact modeling session at the MIXDES'14 Conference in Lublin (PL), June 19-21, 2014
  
• an autumn MOS-AK/ESSDERC/ESSCIRC workshop in Venice (I), Sept. 26, 2014
  
• MOS-AK Q4 Workshop San Francisco (US), Dec. 2014

In the meantime, please also visit www.mos-ak.org where we will continue the discussions of all compact/SPICE modeling topics and its Verilog-A standardization.

--WG--V2014

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[mos-ak] CUSPICE: CUDA-accelerated NGSPICE release available immediately

 Recently, Francesco Lannutti, NGSPICE lead developer, has announced the CUSPICE: CUDA-accelerated NGSPICE release. The NVIDIA has recognised importance of the open source CAD/EDA tools and gave the permission to release CUSPICE as an integral part of the NGSPICE simulation platform. New NGSPICE extension is available immediately on the NGSPICE repository, in the branch named 'CUSPICE'. 

 At the moment only BSIM4v7, CAP, IND, ISRC, RES and VSRC device models are supported by the CUSPICE simulator. With broad acceptance of the NGSPICE simulation platform, we can expect other standard models and new extensions developed, soon. 

[read more...]

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[Abstracts Due Extended] 2014 NanoTech Workshop on Compact Modeling

 NanoTech Workshop on Compact Modeling Important Dates:

• Late Poster Abstracts Due: Rolling Submissions - May 15
• Notification: Rolling Notification Date

Authors of research submissions, upon acceptance, must register for the conference. [read more...]

Devices That You Definitely Will (and Just Might) Use: Emerging Transistor Technologies for the Near-and Long-Term

 WEDNESDAY June 04, 4:00pm - 6:00pm | Room 302 

 TRACK: EDA

 TOPIC AREA: EMERGING TECHNOLOGIES

 SPECIAL DAC SESSION 63: Devices That You Definitely Will (and Just Might) Use: Emerging Transistor Technologies for the Near-and Long-Term

Chair:  Michael Niemier; Univ. of Notre Dame, IN
Organizers:  Michael Niemier; Univ. of Notre Dame, IN
Xiaobo Sharon Hu; Univ. of Notre Dame, IN

Want to learn about the latest developments in FinFET-based processor design? What other transistor technologies might follow FinFETs and would they bring new design and modeling challenges? Come to this session to hear about both near- and long-term transistor technologies and their prospects for continuing Moore’s Law-based performance scaling trends. The session will begin with a discussion of FinFET technology; subsequent presentations will discuss tunnel transistors (TFETs) as well as other emerging FET technologies that could reenable voltage scaling. The session will conclude with a discussion of modeling efforts that consider the impact of new device technologies on von Neumann architectures as well as hybrid analog/digital circuits and architectures.

63.1 FinFET's and Their Implications for Design Now and in the Future

• Speaker: Rob Aitken; ARM Ltd., San Jose, CA
  Greg Yeric; ARM Ltd., Austin, TX
  Brian Cline; ARM Ltd., Austin, TX
  Lucian Shifren; ARM Ltd., San Jose, CA

63.2 Emerging Devices for Logic: Can a Low-Power Switch Be Fast?

• Speaker: Thomas Theis; IBM T.J. Watson Research Center, Yorktown Heights, NY

63.3 Energy Efficient Tunnel-FET Transistors for Beyond CMOS Logic

• Speaker: Uygar Avci; Intel Corp., Portland, OR
  Daniel Morris; Intel Corp., Portland, OR
  Ian Young; Intel Corp., Hillsboro, OR

63.4 Steep Slope Devices: Enabling New Architectural Paradigms

• Speaker: Vijaykrishnan Narayanan; Pennsylvania State Univ., State College, PA
  Karthik Swaminathan; Pennsylvania State Univ., State College, PA
  Huichu Liu; Pennsylvania State Univ., State College, PA
  Moon Seok Kim; Pennsylvania State Univ., State College, PA
  Xueqing Li; Pennsylvania State Univ., State College, PA
  Jack Sampson; Pennsylvania State Univ., University Park, PA

[more about the DAC Conference]

[mos-ak] [on-line publications] Spring MOS-AK Workshop in London

  

Recent, Spring MOS-AK Workshop at the London Metropolitan University was organized to discuss SPICE/compact modeling and its standardization with following Qucs GPL circuit simulation tutorial. The workshop's presentations are available on-line at <http://www.mos-ak.org/london_2014/>.

   

Please also distribute further information about next MOS-AK related events among all who are interested in the SPICE/compact modeling and its Verilog-A standardization:

• 3rd International Training Course on Compact Modelling (TCCM) Lublin (PL) June 18, 2014
• http://compactmodelling.eu/tccm3_about.php
• MIXDES Special Compact Modeling Session, Lublin (PL) June 19-21, 2014
• http://www.mixdes.org/Mixdes3/tekst/view/special
• 12th MOS-AK ESSDERC/ESSCIRC Workshop, Venice (I) Sept. 26, 2014
• http://www.mos-ak.org/venice_2014/
• 7th International MOS-AK Workshop San Francisco (US) Dec. 2014
• http://www.mos-ak.org/

Already now, I am looking forward to meet you at one of our MOS-AK modeling events, soon.

-- with regards - wladek for the Extended MOS-AK/GSA Committee;

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Arbeitskreis Modellierung von Systemen und Parameterextraktion 

Modeling of Systems and Parameter Extraction Working Group

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Over two decades of Enabling Compact Modeling R&D Exchange

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http://www.mos-ak.org

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i-MOS version 201404 release

The i-MOS Team has announced  new release of the interactive Modeling and On-line Simulation
Platform (i-MOS), version 201404. In this release, there are several new services listed as follows:

• Integrating the model benchmark testing suites in Model page
• Including first three benchmark tests for model evaluations
• Constructing the Developer page for device model submissions
• Implementing one industry standard MOSFET model HiSIM2
• Uploading presentation files from IWCM 2014 for your references

For more details, please visit the i-MOS website.

ESSDERC/ESSCIRC 2014 - Paper submission deadline extension

the Organizing Committee decided to extend the paper submission deadline of the 44th ESSDERC and 40th ESSCIRC to:

April 16th, 2014 23:59 (GMT - 07:00 am)

This is a hard deadline and no further extensions will be granted. After the deadline is elapsed, further paper submissions will not be accepted. The notification of paper acceptance, May 27, 2014, has not changed. Detailed information about the conferences is provided at the ESSCIRC/ESSDERC 2014 website.

[read more...]