#imec Presents Sub-1nm Process and #Transistor #Roadmap Until #2036

#imec Presents Sub-1nm Process and #Transistor #Roadmap Until #2036: From Nanometers to the Angstrom Era https://t.co/nM3czuSTXz #semi https://t.co/Deo0XPWbzD

— Wladek Grabinski (@wladek60) May 22, 2022

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from Twitter https://twitter.com/wladek60

May 22, 2022 at 09:08PM
via IFTTT

Leti Innovation Days 2022

CEA-Leti 3-day flagship event featuring industry leader's presentations

The chip shortage has brought with it an extraordinary boost to Moore's Law. 

 Discover policy maker and tech leader strategic decisions on downscaling, 

"More than Moore electronics" and other future technologies for components.

 Identify key emerging technologies to grow your business.

 

Get back to real-life networking! 

In-person event on June 21-23, in Grenoble, France

REGISTER NOW

Plenary Session A plenary session will gather high-level keynote speakers to discuss novel tech strategies to foster out performance. As our world continues to change rapidly and we reach a key turning point in the electronics industry, hear from CEOs, executives and decision makers in order to better understand and meet the challenges of exponential demand for smart electronics in our daily lives. Join us to innovate and participate as a game changer.

6 Workshops: choose yours! New Paradigms for Computing Workshop Satellite Communication Workshop SMEs & the International Market Workshop More than Moore Workshop Sustainability Workshop Healthcare Workshop

Exhibition Networking Live demos: Discover more than 40 live demos and network with potential partners. Startup Corner: Don't miss out on the startup corner to learn about the latest tech offers. Business Meetings: Book meetings with experts to discuss your innovation project. Forum Area: Listen 15 minute sales-oriented pitches. Discover the latest developments offered by CEA-Leti startups and local SMEs specializing in microelectronics. Networking: Join us for two evening receptions.

[mos-ak] [2nd Announcement and C4P] 4th International MOS-AK/LAEDC Workshop July 3 Puebla (MX)

2nd Announcement and C4P

Together with local online host, the LAEDC Organizers as well as all the Extended MOS-AK TPC Committee, would like to invite you to the 4th International MOS-AK/LAEDC Workshop which will be organized as the virtual/online event on July 3  between 8:30am -  12:30pm (UTC/GMT -5 hours) as a hybrid event in Puebla (MX) providing an opportunity to meet with modeling engineers and researchers from Europe and Latin America.

Upcoming MOS-AK/LAEDC Workshop aims to strengthen a network and discussion forum among experts in the field, enhance an open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring academic and industrial experts in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors, in particular using Free 130nm Skywater PDK.

Topics to be covered include the following among other related to the compact/SPICE modeling and its Verilog-A standardization:

• Compact Modeling (CM) of the electron devices
• Advances in semiconductor technologies and processing
• Verilog-A language for CM standardization
• New CM techniques and extraction software
• Open Source (FOSS) TCAD/EDA modeling and simulation
• CM of passive, active, sensors and actuators
• Emerging Devices, Organic TFT, CMOS and SOI-based memory
• Microwave, RF device modeling, high voltage device modeling
• Nanoscale CMOS, BiCMOS, SiGe, GaN, InP devices and circuits
• Technology R&D, DFY, DFT and reliability/aging IC designs
• Foundry/Fabless Interface Strategies (eg: Skywater 130nm CMOS)

List of MOS-AK speakers (tentative in alphabetical order) :

• Sergio Bampi, UFRGS (BR)
• Juan Brito, IMPINJ (BR)
• Antonio Cerdeira, CINVESTAV (MX)
• Benjamin Iniguez, URV (SP)
• Roberto Murphy, INAOE (MX)
• Jean-Michel Sallese, EPFL (CH)
• Gilson I Wirth, UFRGS (BR)

Online Abstract Submission is open (any related enquiries can be sent to abstracts@mos-ak.org)

Online Event Registration is open (any related enquiries can be sent to registration@mos-ak.org)

Important Dates: 

• Call for Papers: Dec. 2021
• 2nd Announcement: May 2022
• Final Workshop Program: June 2022
• MOS-AK: July 3 2022, Puebla (MX)
• 8:30am - 12:30pm (UTC/GMT -5 hours) MOS-AK Workshop

W.Grabinski for Extended MOS-AK Committee

WG170522

[Presentation] reached 200 reads on RG

 

Yogesh S. Chauhan; Muhammed Karim (Rumi); Sriram V.; Sourabh Khandelwal; Ali Niknejad; Chenming Hu; Weimin Wu; Krishnanshu Dandu; Keith Green; Geoffrey Coram; Sergey Cherepko; Jing Wang; Saurabh Sirohi; Josef Watts; Maria-Anna Chalkiadaki; Anurag Mangla; Antonios Bazigos; Francois Krummenacher; Wladek Grabinski; Christian Enz;

“BSIM6: Symmetric Bulk MOSFET Model”,

presented at the Nano-Tera Workshop (EPFL Nano-Tera),

Lausanne, Dec. 15, 2011

doi: 10.5281/zenodo.6546258.

Outline: BSIM6 is the next BSIM Bulk MOSFET model

• Charge based core derived from Poisson's solution
• Physical effects (SCE, CLM etc.) taken from BSIM4
• Parameter names matched to BSIM4 parameters
• Gummel Symmetry (symmetric @ VDS=0)

FIG: Gummel Symmetry (symmetric @ VDS=0)

[paper] Effect of doping on Al2O3/GaN MOS capacitance

B.Rrustemi^ab, C.Piotrowicz^a, M-A.Jaud^a, F.Triozon^a, W.Vandendaele^a, B.Mohamad^a, R.Gwoziecki^a, G.Ghibaudo^b

Effect of doping on Al2O3/GaN MOS capacitance

Solid-State Electronics

Vol. 194, Aug. 2022, 108356

DOI: 10.1016/j.sse.2022.108356

   
a CEA, LETI, Grenoble (Fermi)
b IMEP-LAHC Minatec, Grenoble(FR)

Abstract: This paper investigates the turning-on-voltage (VFB/VTH) of Al2O3/GaN MOS stacks with n-doped GaN, p-doped GaN and not intentionally doped (NID) GaN by exploiting capacitance measurements on large gate area test structures with systematic variation of Al2O3 thickness (tox). Measurements are compared with 1D Schrödinger-Poisson simulations including incomplete ionization model. The necessity of using a quantum description of electron density is demonstrated especially for thinner gate oxides. We found that, contrary to what is expected, p-doping below the channel barely increases the VTH and the VTH is independent of tox, even if the density of activated acceptors is demonstrated to be sufficiently high. Our results highly suggest that the negative charge induced by p-doping is compensated at the oxide level.

Fig: Al2O3/GaN MOS stacks with n-doped GaN, p-doped GaN and its CV plots