1 CNR - Institute for Microelectronics and Microsystems (IMM), via del Fosso del Cavaliere, 100, 00133 Rome, Italy
2 INFN, Sezione di RomaTre, via della Vasca Navale, 00146 Rome, Italy
3 CNR-SPIN UoS di Napoli, Università degli Studi di Napoli Federico II, Dipartimento di Fisica, piazzale Tecchio, 80, 80125, Napoli, Italy
4 Department of Physics University of “Tor Vergata”, via della Ricerca Scientifica 1, 00133, Rome, Italy
Abstract: A non-quasi-static compact model well suited for the simulation of the electrical behavior of printed organic thin-film transistors (OTFTs) is proposed and validated. The model is based on the discretization of the current continuity equation by using a spline collocation approach, while the electrical transport in the organic semiconductor is described by the variable range hopping theory. The model accounts for the presence of parasitic regions that are often found in the layouts of printed OTFTs due to large process tolerances. The model has been implemented in the Verilog-A language and has been validated by a comparison with the capacitance vs. voltage (small signal) characteristics of the devices and measurements made on OTFT-based common-source amplifiers (large signal). A comparison with a quasi-static version of the model is reported.
Aknowledgements: This work has been funded by the Italian National Institute of Nuclear Physics – INFN -5th commission, under the “FIRE” project (2019-2022) and from INFN-CNR national project (PREMIALE 2012) EOS “Organic Electronics for Innovative research instrumentation”.
