Showing posts with label Cell Libraries. Show all posts
Showing posts with label Cell Libraries. Show all posts

Nov 14, 2024

[paper] Open-source Cell Libraries

Chenlin Shi1, Shinobu Miwa1, Tongxin Yang1, Ryota Shioya2, Hayato Yamaki1
and Hiroki Honda1
"CNFET-OCL: Open-source Cell Libraries for Advanced CNFET Technologies"
IEEE Access (2024)
DOI: 10.1109/ACCESS.2024.0429000

1 Department of Computer and Network Engineering, The University of Electro-Communications, Chofu, Tokyo (J)
2 Department of Creative Informatics, Graduate School of Information Science and Technology, Uni Tokyo, Bunkyo (J)

Abstract: In this paper, we propose CNFET-OCL, the first open-source cell libraries for 5-nm and 7nm carbon nanotube field-effect transistor (CNFET) technologies. Our CNFET-OCL is designed to emulate the predictive 5-nm and 7-nm CNFET technologies presented in a published paper. We achieved this by performing a number of SPICE simulations based on an open-source CNFET SPICE model and making certain assumptions used in previous work. Each of our cell libraries includes two types of delay model (i.e., the composite current source and nonlinear delay model), each having 56 typical standard cells, which is sufficient to design various VLSI circuits. CNFET-OCL fully supports both logic synthesis and timing-driven place and route design in the Cadence design flow. Our experimental results demonstrate that CNFET-OCL can achieve performance levels comparable to those reported in previous studies on CNFETs. Consequently, CNFET-OCL can serve as an effective evaluation tool for the CNFET research community.
FIG: I–V characteristics of transistors used in CNFET5, CNFET7 and ASAP7
with cross-section of a CNFET device.

Acknowledgments: This work is partially supported by JSPS KAKENHI under grant number 18K19778 and 23K18461, and VLSI Design and Education Center (VDEC), The University of Tokyo with the collaboration with CADENCE Corporation and Synopsys Corporation. We thank Logic Research Co., Ltd. for helping generate the LIBERTY files and Edanz (https://jp.edanz.com/ac) for editing a draft of this manuscript. We also thank Mr. Dooseok Yoon for his invaluable help with the SPICE netlist simulation of PROBE3.0.