Neural networks and machine learning approach for compact modeling

[NN] Wang, Qiuwei, Mao Ye, Yao Li, Xiaoxiao Zheng, Jiaji He, Jun Du, and Yiqiang Zhao. "MOSFET modeling of 0.18 μm CMOS technology at 4.2 K using BP neural network." Microelectronics Journal (2023): 105678. DOI: 10.1016/j.sse.2022.108580

Highlights

• The cryogenic characterization of SMIC CMOS technology at 4.2K is presented.
• An optimization model VCCS is proposed to calibrate the cryogenic characteristics.
• BP neural network is, for the first time, used in MOSFET modeling.
• The cryo-model can be applied to SPICE simulator and assist in cryo-CMOS circuit design and simulation.

Fig: The structure of graph-based compact model of FinFET. The model receives the input features such as voltages, geometries, etc. as a vector and predicts the drain current (Ids) and its derivatives as output features.

[ML] Gaidhane, Amol D., Ziyao Yang, and Yu Cao. "Graph-based Compact Modeling (GCM) of CMOS transistors for efficient parameter extraction: A machine learning approach." Solid-State Electronics (2023): 108580.

Highlights

• Developed a Graph-based compact model for FinFET.
• Model implemented in Verilog-A for SPICE simulation.
• Requires less number of model parameters and is computationally efficient than BSIM