Call for Papers
5th International Workshop on Compact Thin-Film Transistor (TFT) Modeling for Circuit Simulation (CTFT)
CEA-LITEN, MINATEC Campus, Grenoble, France, June 21, 2013
In recent years, the increasing use of active matrix flat-panel displays and bio-medical imagers in commercial electronic products has drawn a significant attention to thin-film transistors (TFT) and technologies. TFTs on amorphous- and poly-silicon as well as newly emerging organic, transparent metal oxide and nano-composite semiconductor technologies are becoming increasingly common. For example, flat panel displays are finding widespread use in many products such as cellular phones, personal digital assistants (PDAs), camcorders, laptop personal computers (PCs), to name a few. The active matrix display is composed of a grid or matrix of picture elements called as "pixels". Thousands or millions of these pixels together create an image on the display, in which the TFTs act as switches to individually turn each pixel. More increasingly TFTs are starting to be used as analog circuit elements for rudimentary signal conditioning. Therefore, physically-based compact modeling of TFTs for circuit simulation is crucial to accurately and reliably predict TFT behavior in the active matrix. A concentrated R&D effort is critical for developing physically-based compact TFT models for emerging thin-film technologies, and significant R&D efforts along these lines are underway world-wide.
The CTFT workshop will provide a forum for discussions and current practices on compact TFT modeling. The 2013 CTFT workshop edition will be held on June 21 in Grenoble (France) in combination with the 9th International Conference on Organic Electronics (ICOE, June 18-20, www.icoe2013.org ). The CTFT workshop is sponsored by IEEE EDS Compact Modeling Technical Committee in joint collaboration with CEA-LITEN, the Universitat Rovira i Virgili (Tarragona Spain) and the University of Cambridge (UK).
A partial list of the areas of interest includes:
Abstract (500 Word) Submission deadline: May 24, 20135th International Workshop on Compact Thin-Film Transistor (TFT) Modeling for Circuit Simulation (CTFT)
CEA-LITEN, MINATEC Campus, Grenoble, France, June 21, 2013
In recent years, the increasing use of active matrix flat-panel displays and bio-medical imagers in commercial electronic products has drawn a significant attention to thin-film transistors (TFT) and technologies. TFTs on amorphous- and poly-silicon as well as newly emerging organic, transparent metal oxide and nano-composite semiconductor technologies are becoming increasingly common. For example, flat panel displays are finding widespread use in many products such as cellular phones, personal digital assistants (PDAs), camcorders, laptop personal computers (PCs), to name a few. The active matrix display is composed of a grid or matrix of picture elements called as "pixels". Thousands or millions of these pixels together create an image on the display, in which the TFTs act as switches to individually turn each pixel. More increasingly TFTs are starting to be used as analog circuit elements for rudimentary signal conditioning. Therefore, physically-based compact modeling of TFTs for circuit simulation is crucial to accurately and reliably predict TFT behavior in the active matrix. A concentrated R&D effort is critical for developing physically-based compact TFT models for emerging thin-film technologies, and significant R&D efforts along these lines are underway world-wide.
The CTFT workshop will provide a forum for discussions and current practices on compact TFT modeling. The 2013 CTFT workshop edition will be held on June 21 in Grenoble (France) in combination with the 9th International Conference on Organic Electronics (ICOE, June 18-20, www.icoe2013.org ). The CTFT workshop is sponsored by IEEE EDS Compact Modeling Technical Committee in joint collaboration with CEA-LITEN, the Universitat Rovira i Virgili (Tarragona Spain) and the University of Cambridge (UK).
A partial list of the areas of interest includes:
- Physics of TFTs and operating principles
- Compact TFT device models for circuit simulation
- Model implementation and circuit analysis techniques
- Model parameter extraction techniques
- Applications of compact TFT models in emerging products
- Compact models for interconnects in active matrix flat panels
Prospective authors should submit a 500-word abstract to: Bogdan Mihai Nae (nae.bogden@urv.cat)
Submission of a 1-page or 2-page single-column paper to be included in proceedings: June 8, 2013.
Download the word template here for the 1-page or 2-page final version of the paper.
Committee Members
Anis Daami, CEA-LITEN, France (General Co-Chair) | François Templier, CEA-LITEN, France (General Co-Chair) |
Vincent Fischer, CEA-LITEN, France | Arokia Nathan, Cambridge University, UK |
Benjamin Iniguez, Universitat Rovira i Virgili, Spain | Jamal Deen, McMaster University, Canada |
Bill Milne, Cambridge University, UK | Andre Sazonov, University of Waterloo, Canada |
John Robertson, Cambridge University, UK | Xiaojun Guo, Shanghai Jiaotong University, China |
Flora Li, Polymer Vision, The Netherlands | Hyun Jae Kim, Yonsei University, Korea |
Samar Saha, Silterra Corp., USA | Zhou Xing, Nanyang Technological University, Singapore |
Norbert Fruehauf, University of Stuttgart, Germany | Peyman Servati, University of British Columbia, Canada |
Man Wong, HKUST, Hong Kong |
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