I copy a part of the original post: 
Accelicon Technologies, Inc. announces the market’s first commercially  available Context Dependent Modeling Platform based on Accelicon’s  flagship device modeling solution MBP. The performance of FETs can vary  significantly, at advanced process nodes, due to layout dependent  proximity effects. Sources of LDEs include Well Proximity Effect (WPE),  lithography distortions, un-intentional stress sources such as Shallow  Trench Isolation (LOD Effect) and intentional stressors which are used  to enhance the performance of the device. These enhancement techniques  include dual-stress liners, embedded SiGe and stress memorization  techniques. At advanced process nodes engineers must analyze LDEs to  minimize undesirable proximity effects and lithography distortions, and  effectively utilize stress enhancement techniques. This analysis can  only be conducted after layout extraction, SPICE modeling alone is not  sufficient. 
Read more at the original post in LinkedIn:
Accelicon announces Context Dependent Modeling Platform
 
 
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