SRC-GRC is calling for grant applications in Cross-disciplinary Semiconductor Research. The role of this program is to stimulate non-traditional thinking about the issues facing the semiconductor industry. It is intended to seed new research and programs for the SRC-GRC and SRC-FCRP. Consistent with the incubator role of the initiative, these will be 1 year non-overhead bearing grants at a funding level of $40K.
The scope of this solicitation is Nanoscale CMOS-Based Architectures. The challenge: Sustaining CMOS value progression through functional scaling and system design. The deadline: may, 1st. In principle, this is not for compact models, but I think that a good proposal including compact modeling could be redacted. Why? Because new devices are required to address the challenges of the next years and there is no way to do it without good compact models. So, at least a part of a sensible proposal should include some compact modeling (if nothing more, some way to go from compact device models to compact functional models... otherwise no real achivements will be obtained but only some old techniques re-edited)
By the way, IBM India is looking for Compact Model Engineers. Have a look at their web.