It seems that this is the star subject in compact modelling in both Solid-State Electronics from Elsevier and the IEEE Transactions on Electron Devices. I have seen at least four different papers on the subject.
I think that the more interesting one among them is "A Review of Core Compact Models for Undoped Double-Gate SOI MOSFETs", from Adelmo Ortiz-Conde et al. I believe this for two reasons: the first one is that it is very convenient having a review of the state-of-the-art from time to time, and the second reason is that they are, probably, one of the best people to do this review, because they were one of the first research groups to work on this subject.
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