V. Veliadis, "The Impact of Education in Accelerating Commercialization of Wide-Bandgap Power Electronics [Expert View]," in IEEE Power Electronics Magazine, vol. 6, no. 2, pp. 62-66, June 2019
— Wladek Grabinski (@wladek60) August 26, 2019
doi: 10.1109/MPEL.2019.2910715 https://t.co/R14V6BDxXR #paper pic.twitter.com/NnTfIqzaRR
IEEE Annual Election: IEEE President-Elect Candidate: DEJAN S. MILOJICIC, PhD https://t.co/YGXMj7XzQM (Nominated by IEEE Board of Directors) Distinguished Technologist; Hewlett Packard Labs Palo Alto, California, USA
— Wladek Grabinski (@wladek60) August 26, 2019
https://t.co/eCpVS4yzu9 #paper pic.twitter.com/4b8EOTaQMF
B. Contreras, G. Ducoudray, R. Palomera and C. Bernal, "Automated Parameter Extraction and #SPICE #Model Modification For Gate Enclosed MOSFETs Simulation," 16th SMACD, Lausanne, Switzerland, 2019, pp. 189-192 https://t.co/nBleBsXkFf
— Wladek Grabinski (@wladek60) August 26, 2019
The EPFL HEMT Model is a design-oriented charge-based model for dc operation of AlGaAs/GaAs and AlGaN/GaN-based high-mobility field-effect transistors. https://t.co/KoxvcDSPTh https://t.co/c5fUa76rV7 #paper pic.twitter.com/k5U7l3htU6
— Wladek Grabinski (@wladek60) August 23, 2019
#Welsh put £1.3m into #compound process #technology development https://t.co/Jhdwm4WDM8 #paper pic.twitter.com/hmOlw93jdl
— Wladek Grabinski (@wladek60) August 23, 2019
“IEEE EDS MQ at IIT Kanpur:
— Wladek Grabinski (@wladek60) August 23, 2019
B.Iniguez, URV, Spain: Universal TFT compact model
A.Kottantharayil, IIT Bombay: Graphene based devices
A.Dixit, IIT Delhi: Multiple Gate FET Modeling
Y.Chauhan, IIT Kanpur: Negative Capacitance Transistor
https://t.co/bbY1s1g62H #paper
#Compact #Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model https://t.co/KP3af6KD3E pic.twitter.com/hDA7MDEVnc
— Wladek Grabinski (@wladek60) August 23, 2019
