Call for Papers PRIME 2015

 The PRIME 2015 Call for Papers is available at: 

 http://web.eng.gla.ac.uk/prime2015/static/images/PRIME2015CFPv2.pdf 

The purpose of the PRIME Conference is to grow Ph.D students' experience in the early stage of their career by creating a connection between academic world and companies.

A Workshop is organized for all conference participants on June 29th. Moreover, a Company Fair is organized for all conference participants, to create a connection between major companies in Electronics/Microelectronics and Ph. D students.

PRIME 2015 topics of interest include, but are not limited, to:

• Micro/nanoelectronics
• Semiconductors
• Analog and Digital Signal Processing
• Computer Aided Design
• Analog, Digital, Mixed-Signal and RF IC Design
• Integrated Power ICs
• RF, Microwave and Millimeterwave Circuits
• VLSI and SoC Applications
• Visual Signal Processing
• Sensor Systems and MEMS
• Energy Scavenging
• Technical trends and challenges
• Electronic Skin

[read more...]

Meet with Silvaco at IEDM 2014

Silvaco will showcase at IEDM products for applications such as displays, power devices, optical devices, advanced CMOS process development, radiation & soft error reliability, analog and memory design.

• Victory Process, Device and Stress for 1D, 2D and 3D TCAD simulation for applications such as TFT displays, IGBT power devices, lasers, image sensors, advanced CMOS devices such as FDSOI and FinFETs, radiation and soft error reliability simulation
• Clever for 3D parasitic RC extraction with the highest accuracy capacitance extraction for application such as TFT design, FinFET SRAM analysis
• Utmost IV for creating SPICE models for any device type including TFT, UOTFT, BSIM-CMG for FinFETs, HSIM-HV2 for high voltage devices
• Affordable and complete custom design flow including schematic entry, layout, simulation, analysis and verification ideally suited to analog, power management applications and for process nodes such as 65nm/40nm that are key targets for Internet of Thing (IoT) designs
• SmartSpice for simulation of circuits such as analog/mixed-signal, HSIO, RF, SRAM, standard cells, TFT panels, power ICs and for which recent performance enhancement benchmark data will be shared
• SmartSpice for library, memory and critical path characterization with built-in optimizers and circuit rubber-banding capability, having achieved 16nm FinFET model certification and includes PODE and ETMI reliability model support
• SmartSpice Soft Error Reliability capability that is used to analyze the impact of Single Event Effects (SEE) on circuit performance, an increasingly important challenge at 20nm and below technology nodes 

More information at their website.

[mos-ak] FOSDEM 2015 Electronic Design Automation Devroom Call for Participation

 This is the call for participation in the FOSDEM 2015 devroom on Free/Open Source Software (FOSS) Electronic Design Automation (EDA) tools, to be held on Sunday 1 February 2015 in Brussels, Belgium. We are looking for contributions under the form of talks covering the following main topics:

• Printed Circuit Board (PCB) design tools (e.g. KiCad and gEDA)
  
• High-level modelling tools for PCB and Hardware Description Language (HDL) design (e.g. Libre-FDATool)
  
• Analogue and digital simulators (e.g. ngspice, Qucs, Gnucap, Xyce, GHDL, Icarus and Verilator)
  
• Inter-project opportunities for collaboration

We hope to provide an opportunity for attendees to bring themselves up to date on the latest FOSS EDA developments, share knowledge and identify opportunities to collaborate on development tasks.

The submission process

Please submit your proposals at https://penta.fosdem.org/submission/FOSDEM15 before 1 December 2014.

If you already have a Pentabarf account (for example as a result of having submitted a proposal in the past), make sure you use it to log in and submit your proposal. Do not create a new account if you already have one. Please provide a bit of information about yourself in Person -> Biography. When you submit your proposal (creating an "Event" in Pentabarf), make sure you choose the "Electronic design automation devroom" in the track drop-down menu. Otherwise your proposal might go unnoticed. Fill in at least a title and abstract for the proposed talk and a suggested duration. Bear in mind that a lot of the value in these meetings comes from the discussions, so please be reasonable regarding the duration of the talk.

Important dates

• 1 December 2014: deadline for submission of proposals
  
• 15 December 2014: speakers notified
  
• 30 December 2014: schedule published at https://fosdem.org/
  
• 1 February 2015: devroom day
  

Recordings

The FOSDEM organisers hope to be able to live-stream and record all the talks. The recordings will be published under the same licence as all FOSDEM content (CC-BY). Only presentations will be recorded, not informal discussions and whatever happens during the lunch break. By agreeing to present at FOSDEM, you automatically give permission to be recorded. The organisers will agree to make exceptions but only for exceptional and well-reasoned cases.
Mailing list

Feel free to subscribe to the mailing list of the EDA devroom to submit ideas, ask questions and generally discuss about the event.

Spread the word!
This is the first EDA devroom at FOSDEM. Let's make sure as many projects and developers as possible are present. Thanks!

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[mos-ak] [Final Program] 7th International MOS-AK Workshop; December 12, 2014 at Berkeley

 7th International MOS-AK Workshop

 Berkeley Friday, Dec. 12, 2014 

 Final Program  

 

 Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu as well as Extended MOS-AK TPC Committee, we have pleasure to invite to the 7th consecutive International MOS-AK Workshop which will be held at Berkeley, California, USA. The event is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool vendors. 

Venue:

Room 540 in Cory Hall

EECS Department

University of California, Berkeley

Final MOS-AK Workshop Program  
http://www.mos-ak.org/berkeley_2014/

Free on-line workshop registration:
http://www.mos-ak.org/berkeley_2014/registration.php

Postworkshop publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK/GSA Committee

WG181114

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NEW BOOK - Fabless: The Transformation of the Semiconductor Industry

 Fabless: The Transformation of the Semiconductor Industry
 By Daniel Nenni and Paul McLellan
 Foreword By TSMC

 The purpose of this book is to illustrate the magnificence of the fabless semiconductor ecosystem, and to give credit where credit is due by tracing the history of the semiconductor industry from both a technical and business perspective. [Book Preview]

Coupon code: LinkedIn2014

The author is offering to all LinkedIn connections a 50% off coupon code for the eBook version of "Fabless: The Transformation of the Semiconductor Industry". Feel free to forward this info to a friend or coworker. This eBook coupon expires on December 31, 2014. A paper version of the book is available on Amazon. For either version please click HERE for the SemiWiki shopping cart.