Jan 8, 2021

[C4P] Spintronics-Devices and Circuits

Call for Papers for a Special Issue of 
IEEE Transactions on Electron Devices on
Spintronics-Devices and Circuits
Submission deadline: 30 September, 2021 
Publication date: April 2022

Spintronics is one of the emerging fields for the next-generation nanoscale devices offering better memory and processing capabilities with improved performance levels. It demonstrates great potential in the post-Moore era. Ever since the discovery of Giant Magneto-Resistance (GMR) effect in 1988, spintronics has shown rapid progress. Recent advances have expanded this technology to the entire electronics industry of sensors, memories, oscillators, quantum information processors, computer architecture, brain inspired computing and various other fields. Spintronics is now one of the most researched areas and is on the verge of becoming a mainstream technology. A hard disk drive (HDD) invented by IBM in 1956, now has a global market revenue of approximately $12bn. Other emerging field of application for this technology is magnetic field sensors that showcased a market revenue of ~$19b in 2018. The magnetic memory production at major foundries such as Samsung, Globalfoundries, Western Digital and TSMC marks the adoption of spintronics technology. However, in order to meet the ever-increasing demands of the industry, innovation in terms of modeling, design, materials, processes, circuits and applications are required. This Special Issue of the IEEE Transactions on Electron Devices will feature the most recent developments and the state-of-the-art in the field of spintronic devices, circuits and new architectures for high performance.

Topics of interest include, but are not limited to:
Materials:
Ferromagnets, Antiferromagnets, 2D material for better spin manipulation and spin logic devices, Heusler alloys, dilute magnetic semiconductors (DMS), half-metallic ferromagnet (HMF)
Transport mechanism:
Spin accumulation, injection and detection in spin devices, spin pumping techniques, angular momentum transportation by spin polarized currents, spin waves, magnons, spin hall effect, spin transfer torque, enhancement in spin diffusion length and coherence time
Spintronics devices:
STT-MRAM, SOT-MRAM, VCMA-MRAM, domain-wall, skyrmions, nano-oscillators, sensors etc. Low power and high-speed switching schemes for spintronic devices.
Optoelectronics and Spintronics:
All-optical switching of magnetization, inverse magnetooptical effects, single shot optical switching, modeling circuit and architecture level design for ultra-fast laser excitation
Memories:
High storage density MRAM, enhancement in power efficiency and speed
In-memory computing:
Spintronics based in-memory computing/ processing circuits/architectures and applications
Quantum Computing:
Quantum information processing, protocol for communication, computation and sensing, algorithms, spin qubit, systems and applications, spintronics-based quantum memories
Neuromorphic computing:
Hardware implementation of neural networks, analog and digital, architectures and applications
Fabrication:
Fabrication and characterization of novel materials and devices, hybrid spintronics integration and fabrication
Spintronics based circuits:
Reconfigurable and programmable spintronics based circuits, Security applications including RNG and PUF, ADC/DAC, reliability and power performance analysis of spintronics based devices and circuits

Submission instructions: Please visit the following link to download the templates:
http://www.ieee.org/publications_standards/publications/authors/author_templates.html
In your cover letter, please indicate that your submission is for this special issue.
Submission site: https://mc.manuscriptcentral.com/ted

The papers must present original material that has not been copyrighted, published or accepted
for publications in any other archival publications, that is not currently being considered for
publications elsewhere, and that will not be submitted elsewhere while under considerations
by the Transactions on Electron Devices.

Guest Editors:
1. Prof. Brajesh Kumar Kaushik, Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee, INDIA (Lead Guest Editor)
2. Dr. Sanjeev Aggarwal, Everspin Technologies Inc., USA
3. Prof. Supriyo Bandyopadhyay, Department of Electrical and Computer Engineering, VCU College of Engineering, USA
4. Prof. Debanjan Bhowmik, Department of Electrical Engineering, Indian Institute of Technology Delhi, INDIA
5. Dr. Vivek De, Circuits Research Lab, Intel, USA
6. Dr. Bernard Dieny, SPINTEC, IRIG/CEA Grenoble, FRANCE
7. Prof. Wang Kang, School of Microelectronics, Beihang University, CHINA
8. Prof. S.N. Piramanayagam, School of Physical & Mathematical Sciences - Division of Physics & Applied Physics, Nanyang Technological University, SINGAPORE
9. Prof. Kaushik Roy, School of Electrical and Computer Engineering, Purdue
University, USA
10. Prof. Ashwin A. Tulapukur, Department of Electrical Engineering, Indian Institute of Technology Bombay, INDIA

[C4P] New simulation methodologies for next-generation TCAD

Call for Papers for a Special Issue of
IEEE Transactions on Electron Devices on
"New simulation methodologies for next-generation TCAD" 
Submission deadline: February 28, 2021 
Publication date: November 2021

Technology Computer Aided Design is used to simulate semiconductor processes and devices,a field which has become increasingly complex and heterogeneous. Processing of integrated circuits requires nowadays over 400 process steps, and the resultant devices often have a complicated 3D structure and contain various materials. The full device behavior can only be understood by considering effects on all length scales from atomistic (interfaces, defects etc.) over nanometric (quantum confinement, non-bulk properties etc.) to full chip dimensions (strain, heat transport etc.), and time scales from femtoseconds to seconds. Voltages, currents and charges have been scaled to such low levels that electronic noise, statistical effects and process variations have a strong impact. Devices based on new materials (e.g. 2D crystals) and physical principles (ferroelectrics, magnetic materials, qubits etc.) challenge standard TCAD approaches. While the simulation methods developed by the physics community can describe the basic device behavior, they often lack important simulation capabilities like, for example, transient simulations or integration with other TCAD tools and are too slow for daily use. Due to the complexity of semiconductor technology, it becomes more and more difficult to assess the impact of a change in processing or device structure on circuit performance by looking at a single aspect of an isolated device under idealized conditions. Instead a TCAD tool chain is required that can handle realistic device structures embedded in a chip environment. New methodologies are required for all aspects of TCAD to ensure an efficient tool chain covering from atomistic effects to circuit behavior based on flexible simulation models that can handle new materials, device principles and the ensuing large-scale simulations.
This Special Issue of the IEEE Transactions on Electron Devices will feature the most recent developments and the state of the art in the field of TCAD for processing and for device behavior with a focus on new methodologies that improve the tool chain. Papers must be new and present original material that has not been copyrighted, published or accepted for publications in any other archival publications, that is not currently being considered for publications elsewhere, and that will not be submitted elsewhere while under considerations by the Transactions on Electron Devices.

Topics of interest include, but are not limited to:
• Artificial Intelligence applied to TCAD
• TCAD device models for
• new materials (2D materials, oxides, organic semiconductors, oxide semiconductors,
nanowire devices etc.)
• new device types (magnetic devices, memristors, spintronics, qubits, sensors etc.)
• physical effects (ferroelectric dielectrics, thermal transport at nanoscale, atomistic
simulation etc.)
• simulation conditions that push the limits of standard TCAD: ballistic transport, THz
frequencies, cryogenic conditions, device degradation, electromagnetic and plasma
waves in active devices, transient simulations, noise and fluctuations, microscopic 
simulation of large power devices
• Process simulation
• Atomistic process simulation to generate structures for atomistic device simulations
(including both interconnects and transistors)
• Gate stack modeling including dipole diffusion
• Stress simulation for nanosheet and forksheet devices and stress simulations
including layout effects
• Topological simulation
• Equipment simulation
• New methods for the TCAD tool chain
• Self-consistent integration of simulation models into the hierarchy
• Device-circuit interaction
• Multi-physics and multi-scale integration
• Efficient use of the data produced along the chain
• Workflow improvements
• Methods that improve the turn-around-time for TCAD simulations

Submission instructions: Manuscripts should be submitted in a double column format
using an IEEE style file. Please visit the following link to download the templates:
http://www.ieee.org/publications_standards/publications/authors/author_templates.html
In your cover letter, please indicate that your submission is for this special issue.

Guest Editors:
1. Prof. Fabrizio Bonani, Politecnico di Torino, Italy
2. Dr. Stephen Cea, Intel Corp., USA
3. Prof. Elena Gnani, University of Bologna, Italy
4. Prof. Sung-Min Hong, GIST, Republic of Korea
5. Dr. Seonghoon Jin, Samsung, USA
6. Prof. Christoph Jungemann, RWTH Aachen, Germany
7. Prof. Xiaoyan Liu, Peking University, China
8. Dr. Victor Moroz, Synopsys, USA
9. Dr. Anne Verhulst, imec, Belgium

Jan 7, 2021

[paper] Generalized EKV Charge-based MOSFET Model

A Generalized EKV Charge-based MOSFET Model Including Oxide and Interface Traps
Chun-Min Zhanga,  Farzan Jazaeria,  Giulio Borghellob,  Serena Mattiazzoc,  Andrea Baschirottod
and Christian Enza
Available online 7 January 2021, 107951
Open Access under a Creative Commons License
DOI: 10.1016/j.sse.2020.107951

a Integrated Circuits Laboratory (ICLAB), École Polytechnique Fédérale de Lausanne (EPFL), Neuchâtel 2000, Switzerland
b Department of Experimental Physics, CERN, Geneva 1211, Switzerland
c Department of Information Engineering, INFN Padova and University of Padova, Padova 35131, Italy
d Microelectronic Group, INFN Milano-Bicocca and University of Milano-Bicocca, Milano 20126, Italy

Abstract: This paper presents a generalized charge-based EKV MOSFET model that includes the effects of trapped charges in the bulk oxide and at the silicon/oxide interface. It is shown that in the presence of oxide- and interface-trapped charges, the mobile charge density can still be linearized but with respect to both the surface potential and the channel voltage. This enables us to derive closed-form expressions for the mobile charge density and the drain current. These simple formulations demonstrate the effects of charge trapping on MOSFET characteristics and crucial device parameters. The proposed charge-based analytical model, including the effect of velocity saturation, is successfully validated through measurements performed on devices from a 28nm bulk CMOS technology. Ultrahigh total ionizing doses up to 1 Grad (SiO2) are applied to generate oxide-trapped charges and activate the passivated interface traps. Despite a small number of parameters, the model is capable of accurately capturing the measurement results over a wide range of device operation from weak to strong inversion. Explicit expressions of device parameters also allow for the extraction of the oxide- and interface-trapped charge density.

Fig: Energy band diagrams illustrating interface charge trapping in bulk n- (a) and pMOSFETs (b) in inversion. The quasi-Fermi level of the minority carriers, 𝐸𝐹𝑛 or 𝐸𝐹𝑝, is split from that of the majority carriers 𝐸𝐹 by the channel voltage 𝑉𝑐ℎ

Acknowledgements: The authors would like to thank the EP-ESE group at CERN, especially Dr. Federico Faccio, for the continuous support in radiation measurements and the interesting discussions about data analysis. This work was supported in part by the Swiss National Science Foundation (SNSF) through the GigaradMOST project under grant number 200021_160185 and in part by the Istituto Nazionale di Fisica Nucleare (INFN) through the ScalTech28 Project.

15 Biggest #semi Companies in the World https://t.co/hWRDbS6Mjw https://t.co/LgUQaDw0Mg



from Twitter https://twitter.com/wladek60

January 07, 2021 at 11:39AM
via IFTTT

Junior Scientist (PhD candidate) Positions

♦ Ferroelectric Vertical Nanowire Field Effect Transistors Development
at NaMLab, Dresden (Germany) and at University of Bordeaux (France)
Contact:
Dr.-Ing. Jens Trommer, NaMLab gGmbH 
Dr. Marina Deng, University of Bordeaux 

♦ Millimetre-wave (mmWave) Device; Silicon Waveguide Technologies for future > 100 GHz Applications
at School of Engineering, UC Louvain 
Contact:
Prof. Dimitri Lederer, UC Louvain 

♦ Modeling of Single Photon Avalanche Photodiode Temporal Response
at Institut d'Optique Graduate School, Univ. Saint-Etienne and STM (Crolles)
Contact:
Prof. Raphael Clerc, Univ. Saint-Etienne
Dr. Ing. Denis Rideau, STM