Dec 23, 2019

#paper: Lee, M. Millimetre-scale thin-film batteries on a charge. Nat Electron 2, 550 (2019) doi:10.1038/s41928-019-0346-7 https://t.co/xzO5o0e6fl https://t.co/t5NHibezRc


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December 23, 2019 at 12:38PM
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#paper H. Hu et al., "A Compact Phase Change Memory Model With Dynamic State Variables," in IEEE TED. doi: 10.1109/TED.2019.2956193 https://t.co/PicLTsiRPy https://t.co/E2Knk0ZibS


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December 23, 2019 at 12:14PM
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Dec 20, 2019

Visualizing Moore’s Law in Action (1971-2019) https://t.co/jiCMsFxvVA #paper https://t.co/Ck0Pe8fHEz


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December 20, 2019 at 10:22PM
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#paper Si, M., Saha, A.K., Gao, S. et al. A #ferroelectric semiconductor field-effect transistor #FET. Nat Electron 2, 580–586 (2019) doi:10.1038/s41928-019-0338-7 https://t.co/DfLtGSLdrJ https://t.co/ZOMSORypoN


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December 20, 2019 at 11:43AM
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EspoTek Labrador by EspoTek A small, portable, USB-connected electronics lab-on-a-board that includes an oscilloscope, waveform generator, power supply, logic analyzer, and multimeter. https://t.co/KjhalAzAZy #modeling https://t.co/CR1iTXYklY


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December 20, 2019 at 09:39AM
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#paper Papadopoulos, N., Qiu, W., Ameys, M. et al. Touchscreen tags based on thin-film electronics #TFT for the Internet of Everything #IoT. Nat Electron 2, 606–611 (2019) doi:10.1038/s41928-019-0333-z https://t.co/EW6V32HgM2 https://t.co/5ZeCNzvssH


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December 19, 2019 at 11:22PM
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Dec 19, 2019

IEDM took place last week with: * Tutorials on Saturday * Two parallel short courses on Sunday * Plenary session on Monday morning * Press luncheon on Monday * Then a dozen sessions running in parallel https://t.co/hdrySfWNHf #paper https://t.co/0GxwGRMy0A


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December 19, 2019 at 03:48PM
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Dec 18, 2019

IRPhE 2020 Aghveran, Armenia

International Conference on Microwave & THz Technologies,
Wireless Communications and OptoElectronics
September 23-25, 2020, Aghveran, Armenia

IRPhE 2020 Call for Papers

The aim of the IRPhE’ 2020 Conference is to provide an open forum for the presentation and discussion of current research in Microwave and THz technologies, wireless communications, alternative electronic devices, photonics and its applications.

The main topics of the conference are and not limited to:

  • Microwave devices, antennas, propagation and remote sensing
  • THz technique, spectroscopy and applications
  • Alternative semiconductor and dielectric materials, electronic devices
  • Wireless communications and related information technologies
  • Microwave photonics
For further information visit the website: http://www.irphe.am/?q=conference

Submission Information
Original one page abstracts will be accepted for review in Word and PDF formats.The accepted abstracts will be published in an abstract book and distributed during the conference.
All the authors who have presented their work at the conference will be invited to submit 4-page follow-up papers for publication special IJHSES issue on the "Microwave and THz technologies"

Abstracts must be submitted via email: science@irphe.am.
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Location: Aghveran 2503, Armenia

Dec 17, 2019

Intel’s Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm; It’s worth also pointing out, based on the title of this slide, that #Intel still believes in #Moore’s Law. Just don’t ask how much it’ll cost. https://t.co/VIwrSoWEgB #paper https://t.co/LorF5xyHnT


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December 17, 2019 at 12:03PM
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Dec 16, 2019

#paper Z. Ahmed, Q. Shi, Z. Ma, L. Zhang, H. Guo and M. Chan, "Analytical Monolayer MoS2 MOSFET Modeling Verified by First Principle Simulations," in IEEE EDL doi: 10.1109/LED.2019.2952382 https://t.co/CiaNcxqSwb https://t.co/xxTqg2iAMI


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December 16, 2019 at 02:22PM
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The Open Source Computer Aided Modeling and Design #devroom schedule for #FOSDEM 2020 is official at: https://t.co/5GpDFo6fpo #paper https://t.co/dkTuVHseGP


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December 16, 2019 at 11:13AM
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Dec 4, 2019

The EKV2.6 MOSFET compact #model has had a considerable impact on the academic and industrial community of ultra low power analog/RF IC design, since its inception in 1996. Its Verilog-A code is available online at GitHub, now https://t.co/0iDmBChDVm https://t.co/BTBAbPm7aN


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December 04, 2019 at 03:23PM
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Dec 2, 2019

[mos-ak] [Final Program] 12th International MOS-AK Workshop; Silicon Valley, Dec.11 2019

12th International MOS-AK Workshop
(co-located with the IEDM and Q4 CMC Meetings)
Silicon Valley, December 11, 2019

Together with Silvaco team, the MOS-AK workshop host as well as International MOS-AK Board of R&D Advisers and all the Extended MOS-AK TPC Committee, we have the pleasure to invite to consecutive, 12th International MOS-AK Workshop is Silicon Valley.

Scheduled, subsequent 12th MOS-AK SPICE/Compact Modeling Workshop organized in the Silicon Valley, aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and TCAD/EDA tool developers and vendors. 

The MOS-AK workshop program is available online:

Venue:
Silvaco 
2811 Mission College Blvd., 6th Floor 
Santa Clara, CA 95054

Online Registration is still open
(any related enquiries can be sent to register@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication
in a special Solid State Electronics issue on compact modeling 

W.Grabinski on the behalf of International MOS-AK Committee

WG02122019

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#Alibaba’s growing #opensource stature - Eyes on APAC https://t.co/W3qBN15Wsr https://t.co/DoR0OSzOMh


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December 02, 2019 at 04:07PM
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[C4P] 50th ESSDERC / 46th ESSCIRC

Grenoble (F) Sept.14-18 2020
Call for Papers

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The level of integration for system-on-chip design is rapidly increasing. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers and system designers is necessary. While keeping separate Technical Program Committees, ESSDERC and ESSCIRC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions, regardless to which conference they belong.

TPC Tracks:

  • Advanced Technology, Process and Materials
  • Analog, Power and RF Devices
  • Compact modeling and process/device simulation
  • Joint TRACK: Memory devices and circuits towards non Von Neumann
  • Joint TRACK: Emerging Computing Devices and Circuits
  • Joint TRACK: Devices and circuits for Sensors, Optoelectronics and Display
  • Analog Circuits
  • Data Converters Circuits
  • RF & mmW Circuits
  • Frequency Generation Circuits
  • Wireless & Wireline Circuits & Systems
  • Digital Circuits & Systems
  • Power Management Circuits
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Nov 30, 2019

#paper A. Biswas, D. Ludwig and M. Cotorogea, "A New Computer-Aided Calibration Technique of Physics Based IGBT & Power-Diode Compact Models with Verilog-A Implementation," 2019 SISPAD, Udine, Italy, 2019, pp. 1-4. doi: 10.1109/SISPAD.2019.8870499 https://t.co/tM3k2ejZWs https://t.co/8bzoxK27ru


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November 30, 2019 at 06:12PM
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Nov 29, 2019

PhD Positions at Institute for Microelectronics/TU Wien

PhD Positions
on Characterization, Modeling and Circuit Simulation in Microelectronics
Institute for Microelectronics/TU Wien


The Institute for Microelectronics is a world leading research institute focused on the reliability of circuit components (especially transistors). In addition to conventional Si transistors, the behavior of SiC devices designed for high-power applications is also at the center of interest. The broad field of research conducted at the Institute of Microelectronics ranges from characterization, physical modeling and ab-initio simulations to compact modeling and circuit simulation. For the characterization of transistors, the Institute for Microelectronics has a modern laboratory equipped with commercial and custom-built measurement instruments. To explain the experimental data, elaborate physical models are developed and constantly improved. The models are directly incorporated into state-of-the-art device simulators, i.e. MinimosNT and Comphy. To perform computationally expensive simulations a modern computer cluster is while for circuit simulations Cadence and Synopsis spice simulators are available.

The institute is currently looking for highly talented and motivated young researchers to join the team in one of the following areas:
  • Physical modeling of silicon-carbide transistors
  • Single-defect characterization of low-noise silicon transistors
  • Development of custom-made measurement instruments
  • Circuit simulations using advanced implementation of reliability models in Verilog-A for SPICE
For the positions knowledge in one or more of the following areas is advantageous to complement our team:
  • C/C++ and Python
  • Semiconductor device physics
  • Circuit simulation
  • Implementation of new compact/physical models
  • Handling of device/circuit simulators
  • Design of discrete analog circuits and hardware/software solutions
  • Wafer probers and instruments for microelectronics
  • Keithley instruments and scripting language LUA
  • Measurement techniques in microelectronics (MSM, C(V), DLTS, charge pumping etc.)
As a teaching institution, knowledge transfer and close cooperation with students are very importance. The applicants should like to work together with students and supervise Master’s and Bachelor theses.

Starting Date: As soon as possible

Salary: Three-year positions (40hours/week) are in accordance with the salary regulations of the Austrian Science Fund. The gross annual salary is approximately EUR 40,300

Application Material: Please provide a detailed CV, your collective certificates, your Master’s thesis (weblink or PDF), and a single-page motivation letter (discussing relevant previous experience related to the desired skills and experiences) and summarize your motives for joining us.

Application: Please submit your application to jobs@iue.tuwien.ac.at.
Application Deadline: The positions will remain open until filled.

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#paper J. A. D. Alamo, "Kudos to Our Golden Reviewers," in IEEE Electron Device Letters, vol. 40, no. 12, pp. 1891-1891, Dec. 2019. doi: 10.1109/LED.2019.2953249 https://t.co/dVuoduU4Di https://t.co/XAmjPMHry7

and some 2019 EDL Review Statistics:

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https://t.co/dVuoduU4Di pic.twitter.com/XAmjPMHry7
— Wladek Grabinski (@wladek60) November 29, 2019

November 29, 2019 at 11:45AM
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Do want to do a #PhD with two of the best #companies in the #world and #receive highly #competitive salary package? More #information here: https://t.co/PyBHCi2z7y https://t.co/JXua7rZGAn #modeling https://t.co/2cd5mE3fJt


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November 29, 2019 at 11:31AM
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Nov 28, 2019

X-FAB 车规级特色工艺技术研讨会 诚挚邀请您参加在深圳举办的技术研讨会，共同发掘合作新契机! https://t.co/hhv4z3m9dE #modeling https://t.co/kELItLlPMC


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November 28, 2019 at 01:42PM
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imec jobs Postdoctoral Researcher III-N MOCVD on Si https://t.co/S61MYHsymx #modeling https://t.co/nUH8nrjyUg


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November 28, 2019 at 11:35AM
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#Opensource software on the rise in #Africa [DW | 27.11.2019] https://t.co/S5jwjQgJZt https://t.co/J9RBSdFd95


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November 28, 2019 at 09:47AM
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Nov 27, 2019

Why do we contribute to #opensource software? https://t.co/Mygk0E4uPs https://t.co/J6TXnk7ZEz


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November 27, 2019 at 11:40AM
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Open PhD/PostDoc positions at the University of Pisa

device and 2D materials modeling, analog circuit design, 
power electronics, wireless sensors design

We are in the process of opening a few positions for PhD students and for Post Docs at the University of Pisa, in the fields of modeling of nanoscale electron devices, 2D materials, analog circuit design, power electronics design and wireless sensors for harsh environments. We are now asking for expressions of interest from perspective candidates.

I would be very grateful if you could forward this information to whom you think could be interested in applying.

Expressions of interest must be submitted by email, together with a CV and contact information by 31 Dec 2019 to giuseppe.iannaccone@unipi.it.

The available research topics are listed below. They are typically performed in the framework of a larger project within a European collaboration or of a bilateral project with an industrial sponsor.

1. Theoretical investigation of ultra-low-power nanoscale transistors and memories for large scale integrated circuits. This will include devices based on heterostructures of 2D materials. We are looking for candidates with strong background in Electrical Engineering and/or Physics.

2. Quantum engineering of materials and devices based on heterostructures of 2D materials. This activity is based on materials modeling with quantum chemistry methods and quantum transport modeling. We are looking for candidates with strong background in Physical Chemistry and/or Physics.

3. Design of low-power analog integrated circuits for analog hardware  accelerators of artificial intelligence (deep learning) algorithms and for new computing architectures. We are looking for candidates with strong background in Electrical Engineering.

4. Design of low-power mixed signal circuits for security hardware, such as physical unclonable functions and hardware security signatures. We are looking for candidates with strong background in Electrical Engineering.

5. Modeling of power devices based on GaN and SiC for performance and reliability optimization and model development. We are looking for candidates with strong background in Electrical Engineering and/or in Physics.

6. Design of highly efficient power management circuits and systems based on switched capacitors. Both circuits based on silicon technology, on SiC and on GaN will be considered. We are looking for candidates with strong background in Electrical Engineering.

PhD positions are for three years, Post Doc positions are initially for one year and might be renewed for up to four years. Positions of shorter duration (for visiting students/scholars or for MS  thesis projects) might be considered depending on the expertise of the candidate and the definition of a suitable subproject.

For additional information and specific information on the projects, please send an email to
Prof. Giuseppe Iannaccone
giuseppe.iannaccone@unipi.it

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Location: Lungarno Antonio Pacinotti, 43, 56126 Pisa PI, Italy

Nov 26, 2019

#paper W. Grabinski et al., "FOSS EKV2.6 Verilog-A Compact MOSFET Model," ESSDERC, Krakow, Poland, 2019, pp. 190-193. doi: 10.1109/ESSDERC.2019.8901822 https://t.co/rONWC5mTQE https://t.co/Sw8iobvIai


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November 26, 2019 at 09:13PM
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Nov 22, 2019

ADF Germany on Dec.4 | NI AWR Design Environment Seminar is FREE to attend. Lunch and refreshments are complimentary. https://t.co/NfuD8MRJFd #paper https://t.co/9uDP61kXwz


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November 22, 2019 at 11:01AM
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#FOSS Portal: Free and open-source software - Wikipedia https://t.co/EK2xk0walv #paper https://t.co/yVjzu6xKFw


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November 22, 2019 at 10:23AM
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Nov 19, 2019

[Conference Reports] 2019 Symposia on VLSI Technology and Circuits: Pushing the Limits of Semiconductors for a United and Connected World in IEEE SSC Magazine, vol. 11, no. 4, pp. 83-86, Fall 2019 doi: 10.1109/MSSC.2019.2939456 https://t.co/f51V2MT0S9 #paper https://t.co/pe9IUWra4X


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November 19, 2019 at 08:47PM
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MOS-AK India #45395 is now published in IEEE Xplore

2019 IEEE Conference on Modeling of Systems Circuits and Devices 
(MOS-AK India) - #45395 
is now published in IEEE Xplore

Conference Record #45395

Dear Arifuddin Sohel, Desai UB, Govindacharyulu P.A, Wladek Grabinski, Venkatesh N

Congratulations! 2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India) has been posted to the IEEE Xplore digital library effective 2019-11-18.

Along with publication in IEEE Xplore, IEEE assures wide distribution of conference proceedings by providing abstracting and indexing information of all individual conference papers to worldwide databases. IEEE makes every reasonable attempt to ensure that abstracts and index entries of content accepted into the program are included in databases provided by independent abstracting and indexing services. Each abstracting and indexing partner makes its own editorial decision on what content to include. IEEE cannot guarantee entries are included in any particular database.

IEEE Meetings, Conferences & Events (MCE)
445 Hoes Lane, Piscataway, NJ 08854 USA
IEEE: Advancing Technology for Humanity
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#paper J. Trommer, M. Simon, S. Slesazeck, W. M. Weber and T. Mikolajick, "Eliminating Charge Sharing in Clocked Logic Gates on the Device Level Employing Transistors with Multiple Independent Inputs," ESSDERC 2019, Krakow, 10.1109/ESSDERC.2019.8901730 https://t.co/xGNhchlT24 https://t.co/RpSsxIkfe8


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November 19, 2019 at 05:51PM
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#paper K. Harrouche, R. Kabouche, E. Okada and F. Medjdoub, "High Performance and Highly Robust AlN/GaN HEMTs for Millimeter-Wave Operation," in IEEE Journal of the Electron Devices Society, vol. 7, pp. 1145-1150, 2019. doi: 10.1109/JEDS.2019.2952314 https://t.co/jNkb9EJ9Zn https://t.co/eVGvTeltX5


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November 19, 2019 at 02:54PM
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#paper Faber, H., Anthopoulos, T.D. Adding a new layer to ‘more than Moore’. Nat Electron 2, 497–498 (2019) doi:10.1038/s41928-019-0329-8 https://t.co/0DGQKfB8PA https://t.co/BvjI3yrezw


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November 19, 2019 at 10:38AM
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