The IEEE Electron Device Society (EDS) organizes Mini-Colloquium (MQ) on New Frontiers on Compact Modeling on October 10 in Santa Clara University, Santa Clara CA, USA.
This MQ is focused on the emerging compact device and interconnect models. Six EDS distinguished lecturers have been invited:
J. J. Liou: "Compact modeling of silicon controlled rectifier for electrostatic discharge (ESD) computer aided design applications"
M. J. Deen: "Noise issues in advanced silicon devices and circuits"
N. Sadachika: "Modeling and characterization of RF/analog and noise using HiSIM2"
B. Yu, Y. Taur, J. Song: "Compact modeling of multiple-gate MOSFETs"
L.F. Register: "Nanoscale MOSFET physics: Observations from non-compact modeling studies"
P.K. Yu: "Wafer bonding for heterogeneous integration"
The Chair person will be Samar Saha, IEEE EDS Compact Modeling Technical Committee Chair, from Silterra USA Inc., San Jose, CA.