Showing posts with label Systems Parasitics Extraction. Show all posts
Showing posts with label Systems Parasitics Extraction. Show all posts

Nov 14, 2024

[paper] TCAD for Circuits and Systems

Z. Stanojevic, X. Klemenschits, G. Rzepa, F. Mitterbauer, C. Schleich,
F. Schanovsky, O. Baumgartner, and M. Karner
TCAD for Circuits and Systems: Process Emulation, Parasitics Extraction, Self-Heating
2024 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium
BCICTS, Fort Lauderdale, FL, USA, 2024, pp. 294-297
doi: 10.1109/BCICTS59662.2024.10745677

1 Global TCAD Solutions GmbH., Boesendorferstraße 1/12, 1010 Vienna, Austria

Abstract: We present TCAD-based methodologies that go beyond process and device simulations of single transistors. We show that TCAD solvers can be used as effective tools to resolve the intricacies of current and future technology nodes that are otherwise difficult to access using EDA-level methods alone.

Fig: Single NMOS/PMOS FinFET with the local contacts and their parasitic R/C-components; fitting results for NMOS and PMOS FinFET: gate capacitance, transfer characteristics, output characteristics