Circuit Simulation with SPICE OPUS, Theory and Practice

Authors: Tadej Tuma, Árpád Bûrmen

The Complete Book on Contemporary Circuit Design
Series: Modeling and Simulation in Science, Engineering and Technology
ISBN: 978-0-8176-4866-4, 2009, Hardcover; A Birkhäuser book

Download simulation examples from chapter 7 (examples07.zip 23KB)

More about the book ...

Visit also OPUS Spice web site.

[mos-ak] [Dec.9, 2009] MOS-AK Meeting at Baltimore // 2nd announcement

Please visit the MOS-AK/Baltimore Meeting web page
http://www.mos-ak.org/baltimore/

with updated:
* Speakers list:
http://www.mos-ak.org/baltimore/index.php#Speakers

* Extended Panel Session:
http://www.mos-ak.org/baltimore/index.php#Panel_Discussion

* To register, use available Free On-line Registration form:
http://www.mos-ak.org/baltimore/register.php

* Important dates:
# Nov.30 Final program
# Dec.9, 2009 MOS-AK/GSA Workshop
# collocated with:
* IEDM Conference (Dec.6-9 <http://www.his.com/~iedm/>)
* CMC Meeting (Dec.10-11 <http://www.geia.org/index.asp?bid=597>)
* ISDRS Symposium (Dec. 9-11 <http://www.ece.umd.edu/isdrs2009/>

* MOS-AK/Baltimore Committee:
* Andreas G. Andreou, JHU; Technical Program Chair
* Pekka Ojala, Exar; MOS-AK/GSA WG North America Chair
* Gilson I Wirth; UFRGS; MOS-AK/GSA WG South America Chair
* Ehrenfried Seebacher, austriamicrosystems AG; MOS-AK/GSA WG
Europe Chair
* Chelsea Boone GSA; Senior Research Analyst
* Darryl Leavitt, GSA; Director of Events
* Wladek Grabinski, GMC Suisse; MOS-AK/GSA Workshop Manager

--

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Touchstones of a Quality Compact Model

This paper appears in: Electron Devices, IEEE Transactions on; Nov. 2009; Vol. 56, No. 11; pp: 2374-2375

Authors frequently submit manuscripts to the Transactions in the area of Compact Modeling. It is a subject of much scholarly activity and one of widespread interest to our readers, many of whom are practitioners of semiconductor technology. The reasons for the popularity of this subject area are of course only known to the readers, but it is not unlikely that it is due to the popularity of the models themselves, which in turn may be due to the comparative ease of use which is a prominent feature of most compact models. Simulations using compact models are relatively quick and do not require powerful, high-speed computers to execute. Yet, because of their form, the underlying physics is easy to discern.

The Editorial Board of the Transactions intends to continue to encourage original submissions in this field, but as we do in all subject areas that fall within our scope, we are keenly interested in maintaining and even elevating the quality of the papers we publish in this area. One means of accomplishing this objective is to become more rigorous in rejecting papers that may be technically sound, but are not particularly original or may deal with a narrow, perhaps even trivial aspect of device physics. Conversely, another means is to encourage and stimulate more high quality submissions, which immediately begs the question "What is the definition of high quality?"

Defining quality is not a simple task. However, in may be sufficient to describe some of the attributes of a quality model and thereby prescribe the content of what might be a quality paper on the subject. To wit, a quality model ought to be usable in some way when applied to real devices. It should comprehend all relevant effects of realistic short channel devices. In general, models are more credible if they match experimental data. (An exception might be devices so new that neither samples nor data are readily available.) However, sometimes this is not sufficient since models with large numbers of fitting parameters are really more mathematical and empirical than physical. These types of models miss one of the key attributes of a good compact model viz. the ability to gain an insight into the physics that dominates the operation of the device under study. On the other hand, models that are too narrow in scope miss another key attribute, that is the ability to provide sufficient accuracy to obviate the need to conduct full-blown simulations with all of the concomitant resource demands.

Many compact modeling submissions are related to subthreshold analyses which can be very useful for threshold voltage analysis including quantifying of drain-induced barrier lowering effects and subthreshold slopes. Often, they are based upon idealized abstractions of devices that have the benefit of enabling analytic solutions and if the purpose is simply to elucidate the controlling mechanisms of the device, then this purpose is served. However, often the intent is not explicit and the reader is left with the impression that the model is predictive. Authors may unwittingly contribute to this impression by using TCAD simulations to "verify" the accuracy of the analytic solution, but the simulations are often of the same idealized devices. That is, a demonstration of consistency with TCAD simulations is not necessarily proof that the analytic solution is predictive; rather it may only be a proof that calculations can be used to match the results of numerical methods in specific cases. The question of predictive ability is still open and depends upon whether the simulation, and hence the matching analytic solution, is of a realizable device. This is especially true of modern devices such as multi-gate, three-dimensional MOSFETs where non-idealities have significant effects.

Obviously compact models should be analytical with no differentials, derivatives or integrals. Model parameters should be comparatively easy to extract and their relationship to other parameters should be physically justified. There are other characteristics, one or a few of which, a quality model should exhibit. As an aid to authors, reviewers and editors, we catalog some of these characteristics. A quality compact model should

• incorporate new physics that improves the accuracy or predictive ability of existing models in a meaningful way, and/or
• it should demonstrate a novel method or approach that improves the efficiency of the simulations without loss of accuracy, and/or
• it should take an existing phenomenological or semi-empirical model and establish the physical foundations of the model and/or
• it should provide new insight into the functioning, performance characteristics, reliability, or limits of conventional devices and ideally should even suggest a means of improvement, and/or
• it should provide new insights into how existing models are related, and/or
• it should be predictive of new behaviors which can be subsequently observed and/or,
• it should clarify the domain of validity of existing models.

By no means is this meant to be a comprehensive list. Nevertheless, we anticipate that it is ample in aggregate to convey the sense of what the Editorial Board considers to be the key features of a quality manuscript on compact modeling.

Finally, we end with a few simple suggestions for authors that when followed could expedite the review process and may even improve the chances of acceptance of a manuscript dealing with compact modeling.

a) When presenting results that are compared with simulation results, authors should state which models were turned on in the simulations.

b) When presenting results that are compared with simulation results, authors should include a table that identifies the simulation parameters and the analytical model parameters (physical as well as fitting) used to generate the model traces. If the simulation parameters differ from the corresponding analytical physical parameters, authors should explain why.

c) When presenting results that are compared with simulation results, authors should only show relevant comparison plots with correct models turned on. For example if the compact model considers field-dependent mobility when reporting transport properties, then the corresponding TCAD plots should not be reported using constant mobility.

d) When reporting subthreshold voltages extracted from simulations, authors should state the method of extraction and if by constant current method they should state the current cut-off value used.

e) Authors should actually read and understand the references they cite. Specifically, cited references should actually substantiate the claims made by the author.

It is our passion to continuously improve the quality of the articles we publish. Our hope is that by describing its facets we can quicken the march.

Doug Verret
Editor-in-Chief
Electron Devices, IEEE Transactions on
Houston, TX






REFERENCE:
[1] D. Verret; "Touchstones of a Quality Compact Model" Electron Devices, IEEE Transactions on; Nov. 2009; Vo. 56, No. 11; pp: 2374-2375

Some humor

Original source: phdcomics (which is a page I strongly recommend!)

I wonder what are the figures for "Compact Model", "Physical Model", "Analytical model", etc...

EUROSOI 2010

Sixth Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits
Grenoble, France, 25-27 January, 2010

• Keynote Talks
• SOI- the next five years: The critical role that SOI will play in the semiconductor ecosystem and how it will happen – H. Mendez (SOI Consortium)
• Germanium Integration on Silicon for High Performance FETs and Optical Interconnects – K. Saraswat (Stanford University)
• Training Course
• 3D integration – N. Sillon (CEA-LETI)
• Electrical characterisation of SOI nanodevices – G. Ghibaudo (IMEP)
• Piezoelectrical technology on SOI (RF Filter) – S. Ballandras (CNRS)
• III-V nanoelectronic on insulator – S. Bollaert (CNRS)
• SOI technologies and circuits – J. Hoentschel (Global Foundries)

Read more...

Call for Papers: ICGCS 2010

Global warming, climate change, and sustainability have profound impacts on our lives. The grand challenge faced by circuits and systems communities is to design green electronic devices and systems that consume less energy, thus lead to the reduction of global CO2 emission. The annual International Conference on Green Circuits and System (ICGCS) is our response to this grand challenge. ICGCS aims to address issues in climate change and limited suppliers and become a major international forum for researchers and engineers to exchange their latest findings in technologies related to green circuits and systems. ICGCS is a meeting place for scholars, scientists, educators, students, engineers, entrepreneurs, and managers from different disciplinarians to foster collaborations and to solve complex read world problems. It covers a wide range of topics including, but not limited to, the followings:

• Green Transistors and Devices
• Low Power Low Voltage Techniques for Analog, Mixed-Signal, Digital Circuits
• Sub-threshold Circuit Design
• Energy Efficient Analog Signal Processing Techniques
• Computationally Efficient Digital Signal Processing Techniques
• Signal Processing for Communications
• Visual Signal Processing Techniques and Multimedia Systems
• Optimization Techniques
• Self-Powered Circuits and Systems
• Adaptive and Reconfigurable Circuits and Systems
• Scalable and Power Aware Systems
• Energy Harvesting
• Energy and Power Management
• Green Power Electronic Circuits and Systems
• Renewable Energy
• MEMS and Sensors for Energy Management
• Environmental Sensing, Control and Protection
• Circuits and Systems Technologies for Recycling and Pollution Control
• Emerging Technologies for Green Circuits and Systems

The inaugural conference, ICGCS 2010, will be held in June 2010 in Shanghai, the city hosting World Expo 2010. The participants not only have the opportunities to share their new findings in green circuits and systems but also to witness latest development as showcased in World Expo 2010.

The deadline for submission of Papers is on February 22, 2010. For more details, please visit: http://www.icgcs.org. We welcome you to contribute your work(s) to ICGCS2010 and hope to see you in Shanghai.

Contact: Yong Lian and Tor S. Lande; ICGCS 2010 Technical Program Chairs

Open, One year post doc position for development of HV transistor SPICE models

Education/Experience:

• PhD or Master/Dipl. Ing. in Physics or Electronic Engineering
• Experience in SPICE modeling (e.g. BSIM, EKV, PSP, HiSIM)

Place of Employment:

• Unterpremstaetten/Graz , Austria

Job Description / tasks responsibilities:

• Development of HV transistor SPICE models
• Parameter extraction and measurements for SPICE models
• Project management within the COMON project
• Writing documents and deliverables

Contact: Dipl. Ing. Ehrenfried Seebacher
Senior Manager Process and Device Characterization - Modeling

---

austriamicrosystems AG
Operations - Process Developments
Schloss Premstaetten
8141, Unterpremstaetten, Austria
Tel: +43 3136 500 5487
Fax: +43 3136 500 5755

A CAD-compatible closed form approximation for the inversion charge areal density in double-gate MOSFETs

Venkatnarayan Hariharan, Juzer Vasi, V. Ramgopal Rao; Solid-State Electronics, Volume 53, Issue 2, February 2009, Pages 218-224

Abstract: In developing the drain current model of a symmetrically driven, undoped (or lightly doped) symmetric double-gate MOSFET (SDGFET), one encounters a transcendental equation relating the value of an intermediate variable β (which is related to the inversion charge areal density and also surface-potential) to the gate and drain voltages; as a result, it doesn’t have a closed form solution. From a compact modeling perspective, it is desirable to have closed form expressions in order to implement them in a circuit simulator. In this paper, we present an accurate closed form approximation for the inversion charge areal density, based on the Lambert-W function. We benchmark our approximation against other existing approximations and show that our approximation is computationally the most efficient and numerically the most robust, at a reduced but acceptable accuracy. Hence, it is suitable for use in implementing inversion charge based compact models.

DOI: 10.1016/j.sse.2008.11.006

Symmetric linearization method for double-gate and surrounding-gate MOSFET models

Gajanan Dessai, Aritra Dey, Gennady Gildenblat, Geert D.J. Smit; Solid-State Electronics, Volume 53, Issue 5, May 2009, Pages 548-556

Abstract: Symmetric linearization method is developed in a form free of the charge-sheet approximation present in its original formulation for bulk MOSFET. This leads to a core compact model of certain multiple-gate transistors that has the form almost identical to that used in a standard PSP MOSFET model. The accuracy of the proposed technique is verified by comparison with the exact results. The new core is compatible with the previous version of the double gate MOSFET model that has been found in agreement with the experimental data including short-channel effects and frequency response.

DOI: 10.1016/j.sse.2009.01.020

CEA-LITEN selects InfiniScale for Organic Electronic devices modeling

InfiniScale today announced that CEA-LITEN has selected InfiniScale’s TechModeler for its organic electronic devices modeling needs.
You can see by their public declarations that they are quite happy:

“InfiniScale’s modeling tool allowed us to shrink our development cycle by a large factor” commented Isabelle Chartier Organic Electroniv program manager at CEA-LITEN- “CEA-Liten is deeply involved in printing Organic Electronic devices and circuits, we target to demonstrate, before the end of 2009, a first all printed organic CMOS circuit. Modeling our devices versus design and technology parameters is critical for our technological developments. Therefore, fast prototyping and fast development cycles achieved with Infiniscale is key to stay on top of the Emerging and promising Organic Electronic market”

“We are pleased by CEA-LITEN commitment “said Dr Firas MOHAMED, CEO of Infiniscale “InfiniScale has taken position on this new industry where there is a need to grow at a fastest possible pace. After a close collaboration through an important R&D project on organic electronic (Printronics a Minalogic cluster project), CEA-LITEN decided to adopt our technology for its advanced organic devices modeling.

We are very pleased to see that our modeling technology, which is already recognized by major semi-conductor players, kept its promise for the organic ambitious industry”.

You can read the full press release here.

UCL invites applications for academic positions for the academic year 2010-2011

• Electronic circuits and mixed analog-digital systems
  
• Energy and power electronics
  
• The deadline for file submission is January 15th 2010 and all application's requirements are detailed on-line
  

An interesting paper in the Intl. Jornal of Numercal Modelling (vol 22(6))

This is not exactly compact modelling, but it's a nice thing to see:

SPICE-aided modelling of dc characteristics of power bipolar transistors with self-heating taken into account

Janusz Zarbski, Krzysztof Górecki
Department of Marine Electronics, Gdynia Maritime University, Morska 83, 81-225 Gdynia, Poland

Abstract
This paper deals with the problem of calculations of the dc characteristics of power bipolar transistors (BJTs) with self-heating taken into account. The electrothermal model of the considered devices dedicated for PSPICE is presented. The correctness of the model was verified experimentally in all ranges of the BJT operation. Two transistors - BD285 and 2N3055 - were arbitrarily selected for investigation. A good agreement between the measured and calculated characteristics of these transistors was observed.

You can access the online version here.

55th IEEE IEDM conference

The 55th annual IEEE IEDM conference will be held at the Hilton Baltimore on December 7-9, 2009 preceded by a day of Short Courses on Sunday, Dec. 6. The world¹s best scientists and engineers in the field of electronics will showcase their work in a program of papers, panels, special sessions, Short Courses and other events that will spotlight more leading work in more areas of the field than any other conference.

The advance registration deadline is November 16 and the deadline for hotel reservations is November 6. For registration and other information, visit the IEDM 2009 home page at http://www.ieee-iedm.org

As a novelty, IEDM can be followed in twitter and facebook... which I think is a good move.

MEMSTECH 2010

6th International Conference
Perspective Technologies and Methods in MEMS Design
Polyana, UKRAINE, 20 - 23 April 2010

Organized by:

• Lviv Polytechnic National University, CAD Department, Ukraine
• Warsaw University of Technology, Institute of Telecommunication, Poland
• IEEE MTT/ED/AP/CPMT/SSC West Ukraine Chapter

Supported by Lviv Regional State Administration

Topics include, but not limited to:

• Analysis, modelling, research and design methods of microsensors and microactuators
• Software systems, models, algorithms, methods and strategies of embedded systems design
• Field issues in embedded systems modelling and design
• Issues of testing, verification, reliability and optimization in embedded systems modelling and design
• Sensors and actuators systems, nanotechnology
• Applications for electron device design
• Information Technology. Engineering Application of Informatics. Engineering Education

Important Dates:

• February 15, 2010
• Deadline for abstract submissions (at least 400 words in plain text file, in English)
• March 15, 2010
• Notification of abstract acceptance
• April 02, 2010
• Deadline for final Camera-Ready Papers submissions (in English)

Read more...

A paper in Thin Solid Films

I've found a paper that may interest you:

The quantum size effects on the surface potential of nano-crystalline silicon thin film transistors

Ling-Feng Mao

(Available online 29 October 2009)

Abstract

The impact of the grain size of nc-Si (nano-crystalline silicon) on the surface potential of doped nc-Si TFTs (thin film transistors) is discussed. Quantum size effects cause the change in both band-gap and dielectric constant of nc-Si. Numerical calculation of the surface potential in nc-Si TFTs shows that the diameter of nc-Si has a larger effect on the surface potential of nc-Si TFTs. The results demonstrate that, for medium size (7 ~ 50 nm), the change in the band-gap of nc-Si should be considered, whereas, for small size (< 7 nm), the change in the dielectric constant of nc-Si should be considered. A simplified surface potential equation for nc-Si TFTs under strong inversion condition is proposed, and shows good agreement with the original equation via numerical calculation.


Have fun!

22nm technology projection

Papeer on 22nm technology projection at Scsong's Blog