G. Hills et al., “Modern microprocessor built from complementary carbon nanotube transistors,” Nature, vol. 572, no. 7771, pp. 595–602, Aug. 2019 https://t.co/pivFGNURgH #paper https://t.co/1FjBr7mNsL

G. Hills et al., “Modern microprocessor built from complementary carbon nanotube transistors,” Nature, vol. 572, no. 7771, pp. 595–602, Aug. 2019 https://t.co/pivFGNURgH #paper pic.twitter.com/1FjBr7mNsL

— Wladek Grabinski (@wladek60) August 30, 2019

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August 30, 2019 at 11:40AM
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#Microsoft readies #exFAT patents for #Linux and #opensource | ZDNet https://t.co/nGURHD35IU https://t.co/NWBfJOiOyL

#Microsoft readies #exFAT patents for #Linux and #opensource | ZDNet https://t.co/nGURHD35IU pic.twitter.com/NWBfJOiOyL

— Wladek Grabinski (@wladek60) August 29, 2019

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August 29, 2019 at 11:11AM
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#IBM’s #OpenSource POWER Play: A #RISC-V Business? https://t.co/11lFmDgnpU https://t.co/io81PcbNqh

#IBM’s #OpenSource POWER Play: A #RISC-V Business? https://t.co/11lFmDgnpU pic.twitter.com/io81PcbNqh

— Wladek Grabinski (@wladek60) August 28, 2019

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August 28, 2019 at 04:11PM
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F. Ávila Herrera et al., "Advanced Short-Channel-Effect Modeling With Applicability to Device Optimization—Potentials and Scaling," in IEEE Transactions on Electron Devices, vol. 66, no. 9, pp. 3726-3733, Sept. 2019 https://t.co/6vkIpdH9F6 #paper https://t.co/sVWISPjNKN

F. Ávila Herrera et al., "Advanced Short-Channel-Effect Modeling With Applicability to Device Optimization—Potentials and Scaling," in IEEE Transactions on Electron Devices, vol. 66, no. 9, pp. 3726-3733, Sept. 2019 https://t.co/6vkIpdH9F6 #paper pic.twitter.com/sVWISPjNKN

— Wladek Grabinski (@wladek60) August 28, 2019

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August 28, 2019 at 05:14PM
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3rd International Workshop on MEMS and Sensor System 2019 (#IWMS 2019) Aug. 27-29 Hi Chi Minh City (VN) https://t.co/hOnegKRO5E #paper https://t.co/fPmyokXQ5w

3rd International Workshop on MEMS and Sensor System 2019 (#IWMS 2019) Aug. 27-29 Hi Chi Minh City (VN) https://t.co/hOnegKRO5E #paper pic.twitter.com/fPmyokXQ5w

— Wladek Grabinski (@wladek60) August 27, 2019

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Is the Threat of ‘Fake Science’ Real? "Thinking ahead to the potential for fake science can better equip research institutions to respond to targeted disinformation while preserving an open scientific community." https://t.co/nzAokiqybW #paper https://t.co/D0WasFZRwv

Is the Threat of ‘Fake Science’ Real?

"Thinking ahead to the potential for fake science can better equip research institutions to respond to targeted disinformation while preserving an open scientific community."https://t.co/nzAokiqybW #paper pic.twitter.com/D0WasFZRwv

— Wladek Grabinski (@wladek60) August 27, 2019

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Y. Yamamoto et al., "The Study of Plasma Induced Damage on 65-nm Silicon on Thin BOX Transistor," in IEEE Journal of the Electron Devices Society, vol. 7, pp. 825-828, 2019 https://t.co/ppz92LZnNi #paper https://t.co/7hmMCY5rvx

Y. Yamamoto et al., "The Study of Plasma Induced Damage on 65-nm Silicon on Thin BOX Transistor," in IEEE Journal of the Electron Devices Society, vol. 7, pp. 825-828, 2019https://t.co/ppz92LZnNi #paper pic.twitter.com/7hmMCY5rvx

— Wladek Grabinski (@wladek60) August 27, 2019

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B. K. Esfeh, V. Kilchytska, N. Planes, M. Haond, D. Flandre and J. Raskin, "28-nm FDSOI nMOSFET RF Figures of Merits and Parasitic Elements Extraction at Cryogenic Temperature Down to 77 K," in IEEE JEDS, vol. 7, pp. 810-816, 2019. https://t.co/VXOuHjBAWI #paper https://t.co/mT1vV0psze

B. K. Esfeh, V. Kilchytska, N. Planes, M. Haond, D. Flandre and J. Raskin, "28-nm FDSOI nMOSFET RF Figures of Merits and Parasitic Elements Extraction at Cryogenic Temperature Down to 77 K," in IEEE JEDS, vol. 7, pp. 810-816, 2019.
https://t.co/VXOuHjBAWI #paper pic.twitter.com/mT1vV0psze

— Wladek Grabinski (@wladek60) August 27, 2019

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低频噪声测试在新兴半导体材料和器件物理机制探索的应用研究 Application Research of Low Frequency Noise Testing in the Exploration of Emerging Semiconductor Materials and Devices Physical Mechanism https://t.co/Y9lDjd1kPn #paper https://t.co/6X4218ejOF

低频噪声测试在新兴半导体材料和器件物理机制探索的应用研究
Application Research of Low Frequency Noise Testing in the Exploration of Emerging Semiconductor Materials and Devices Physical Mechanismhttps://t.co/Y9lDjd1kPn #paper pic.twitter.com/6X4218ejOF

— Wladek Grabinski (@wladek60) August 27, 2019

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August 27, 2019 at 09:15AM
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V. Veliadis, "The Impact of Education in Accelerating Commercialization of Wide-Bandgap Power Electronics [Expert View]," in IEEE Power Electronics Magazine, vol. 6, no. 2, pp. 62-66, June 2019 doi: 10.1109/MPEL.2019.2910715 https://t.co/R14V6BDxXR #paper https://t.co/NnTfIqzaRR

V. Veliadis, "The Impact of Education in Accelerating Commercialization of Wide-Bandgap Power Electronics [Expert View]," in IEEE Power Electronics Magazine, vol. 6, no. 2, pp. 62-66, June 2019

doi: 10.1109/MPEL.2019.2910715 https://t.co/R14V6BDxXR #paper pic.twitter.com/NnTfIqzaRR

— Wladek Grabinski (@wladek60) August 26, 2019

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August 26, 2019 at 08:45PM
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IEEE Annual Election: IEEE President-Elect Candidate: DEJAN S. MILOJICIC, PhD https://t.co/YGXMj7XzQM (Nominated by IEEE Board of Directors) Distinguished Technologist; Hewlett Packard Labs Palo Alto, California, USA https://t.co/eCpVS4yzu9 #paper https://t.co/4b8EOTaQMF

IEEE Annual Election: IEEE President-Elect Candidate: DEJAN S. MILOJICIC, PhD https://t.co/YGXMj7XzQM (Nominated by IEEE Board of Directors) Distinguished Technologist; Hewlett Packard Labs Palo Alto, California, USA
https://t.co/eCpVS4yzu9 #paper pic.twitter.com/4b8EOTaQMF

— Wladek Grabinski (@wladek60) August 26, 2019

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B. Contreras, G. Ducoudray, R. Palomera and C. Bernal, "Automated Parameter Extraction and #SPICE #Model Modification For Gate Enclosed MOSFETs Simulation," 16th SMACD, Lausanne, Switzerland, 2019, pp. 189-192 https://t.co/nBleBsXkFf

B. Contreras, G. Ducoudray, R. Palomera and C. Bernal, "Automated Parameter Extraction and #SPICE #Model Modification For Gate Enclosed MOSFETs Simulation," 16th SMACD, Lausanne, Switzerland, 2019, pp. 189-192 https://t.co/nBleBsXkFf

— Wladek Grabinski (@wladek60) August 26, 2019

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The EPFL HEMT Model is a design-oriented charge-based model for dc operation of AlGaAs/GaAs and AlGaN/GaN-based high-mobility field-effect transistors. https://t.co/KoxvcDSPTh https://t.co/c5fUa76rV7 #paper https://t.co/k5U7l3htU6

The EPFL HEMT Model is a design-oriented charge-based model for dc operation of AlGaAs/GaAs and AlGaN/GaN-based high-mobility field-effect transistors. https://t.co/KoxvcDSPTh https://t.co/c5fUa76rV7 #paper pic.twitter.com/k5U7l3htU6

— Wladek Grabinski (@wladek60) August 23, 2019

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August 23, 2019 at 03:50PM
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#Welsh put £1.3m into #compound process #technology development https://t.co/Jhdwm4WDM8 #paper https://t.co/hmOlw93jdl

#Welsh put £1.3m into #compound process #technology development https://t.co/Jhdwm4WDM8 #paper pic.twitter.com/hmOlw93jdl

— Wladek Grabinski (@wladek60) August 23, 2019

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August 23, 2019 at 03:50PM
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“IEEE EDS MQ at IIT Kanpur: B.Iniguez, URV, Spain: Universal TFT compact model A.Kottantharayil, IIT Bombay: Graphene based devices A.Dixit, IIT Delhi: Multiple Gate FET Modeling Y.Chauhan, IIT Kanpur: Negative Capacitance Transistor https://t.co/bbY1s1g62H #paper

“IEEE EDS MQ at IIT Kanpur:
B.Iniguez, URV, Spain: Universal TFT compact model
A.Kottantharayil, IIT Bombay: Graphene based devices
A.Dixit, IIT Delhi: Multiple Gate FET Modeling
Y.Chauhan, IIT Kanpur: Negative Capacitance Transistor
https://t.co/bbY1s1g62H #paper

— Wladek Grabinski (@wladek60) August 23, 2019

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#Compact #Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model https://t.co/KP3af6KD3E https://t.co/hDA7MDEVnc

#Compact #Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model https://t.co/KP3af6KD3E pic.twitter.com/hDA7MDEVnc

— Wladek Grabinski (@wladek60) August 23, 2019

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For the #SourceForge August 2019 “Staff Pick” Project of the Month, we selected #Octave Forge, a collection of packages providing extra functionality for #GNU Octave which is a great alternative to MatLab https://t.co/P6SMMrg2nM #paper https://t.co/ujqlq3mfWr

For the #SourceForge August 2019 “Staff Pick” Project of the Month, we selected #Octave Forge, a collection of packages providing extra functionality for #GNU Octave which is a great alternative to MatLab https://t.co/P6SMMrg2nM #paper pic.twitter.com/ujqlq3mfWr

— Wladek Grabinski (@wladek60) August 22, 2019

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August 22, 2019 at 09:38AM
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Engineers make #transistors and electronic devices entirely from #thread https://t.co/Q9QQ7ZZLPs #paper https://t.co/9U75LzDWVT

Engineers make #transistors and electronic devices entirely from #thread https://t.co/Q9QQ7ZZLPs #paper pic.twitter.com/9U75LzDWVT

— Wladek Grabinski (@wladek60) August 21, 2019

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August 21, 2019 at 09:08PM
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Maciej Ogorzałek Candidate for 2020 IEEE Vice President-Elect for Technical Activities

To learn more about my qualifications, IEEE activities and accomplishments, please visit

http://www.doit.fais.uj.edu.pl/maciej-ogorzalek

Newly discovered properties in the compound uranium ditelluride, or UTe2, show that it could prove highly resistant to one of the nemeses of #quantum #computer development https://t.co/Lul2Op5W6R #paper https://t.co/C1Nz7Cj5TF

Newly discovered properties in the compound uranium ditelluride, or UTe2, show that it could prove highly resistant to one of the nemeses of #quantum #computer development https://t.co/Lul2Op5W6R #paper pic.twitter.com/C1Nz7Cj5TF

— Wladek Grabinski (@wladek60) August 16, 2019

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August 16, 2019 at 09:55AM
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Why Los Angeles #LA decided to #opensource its future https://t.co/1HsXedylg5 https://t.co/KYyrpOgqWo

Why Los Angeles #LA decided to #opensource its future https://t.co/1HsXedylg5 pic.twitter.com/KYyrpOgqWo

— Wladek Grabinski (@wladek60) August 15, 2019

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August 15, 2019 at 08:11PM
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Flexible Design Pursues PDK, Power; Battery startups aim to enable #flexible #electronics https://t.co/iVc4Wzr78i #paper https://t.co/Pt78L534lg

Flexible Design Pursues PDK, Power; Battery startups aim to enable #flexible #electronics https://t.co/iVc4Wzr78i #paper pic.twitter.com/Pt78L534lg

— Wladek Grabinski (@wladek60) August 14, 2019

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#Huawei to help create nation's first #opensource #foundation https://t.co/OGplZqOI1S https://t.co/Xsdh3Zva8y

#Huawei to help create nation's first #opensource #foundation https://t.co/OGplZqOI1S pic.twitter.com/Xsdh3Zva8y

— Wladek Grabinski (@wladek60) August 13, 2019

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August 13, 2019 at 09:43AM
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[papers] Compact Modeling

Q. C. Nguyen, P. Tounsi, J. Fradin and J. Reynes, "Development of SiC MOSFET Electrical Model and Experimental Validation: Improvement and Reduction of Parameter Number," 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems", Rzeszów, Poland, 2019, pp. 298-301.

doi: 10.23919/MIXDES.2019.8787050

Abstract: In this work, a new approach for electrical modeling of Silicon Carbide (SiC) MOSFET is presented. The developed model is inspired from the Curtice model which is using a mathematic function reflecting MOSFET output characteristics. The first simulation results showed good agreement with measurements. Improvement is needed in order to increase model accuracy and to take into account the influence of the junction temperature on device characteristics.

D. Kasprowicz, "Semiconductor Device Parameter Extraction Based on I–V Measurements and Simulation," 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems", Rzeszów, Poland, 2019, pp. 321-326.

doi: 10.23919/MIXDES.2019.8787195

Abstract: The paper presents a method for extracting the physical parameters of a semiconductor device based on the measurements of its electrical response (e.g. transfer characteristics) combined with simulation. Such extraction is usually performed by an optimization algorithm seeking device-parameter values that minimize the difference between the measured response and its simulated equivalent. The proposed approach needs only an average of 13 objective-function evaluations, i.e. device simulations, to extract three parameters of a single device. If the parameters of a group of devices of the same type are to be extracted, the average number of simulations drops to four per device. This number is much smaller than in conventional optimization procedures. Thus, the proposed procedure can be used even in the absence of an accurate compact model, when time-consuming TCAD simulation must be used to determine the device’s response.

D. Tomaszewski, J. Malesińska, G. Głuszko and K. Kucharski, "Current vs Substrate Bias Characteristics of MOSFETs as a Tool for Parameter Extraction," 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems", Rzeszów, Poland, 2019, pp. 87-91.

doi: 10.23919/MIXDES.2019.8787068

Abstract: An application of the drain current vs substrate bias characteristics of MOSFETs for the device parameter extraction is presented. Modeling of the substrate bias effect on the MOSFET drain current is briefly discussed. A method of the MOSFET characterization is formulated. It requires a measurement of two I(V) characteristics, including the ID(VBS) smooth curve measured in a "sweep" mode. The method allows to extract the threshold voltage parameters and to estimate the in-depth doping profile in the substrate. The proposed approach is demonstrated using I(V) data of the MOSFETs manufactured in ITE in a bulk CMOS process.

#Huawei announces #opensource Harmony OS https://t.co/3oBWFgcXVc https://t.co/kxN86XBMyO

#Huawei announces #opensource Harmony OS https://t.co/3oBWFgcXVc pic.twitter.com/kxN86XBMyO

— Wladek Grabinski (@wladek60) August 12, 2019

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August 12, 2019 at 11:22AM
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Horizon Europe - Commission announces top experts to shape Horizon Europe (2021-2027) missions https://t.co/5s7twEGfG4 #paper https://t.co/YPw6s3cUqX

Horizon Europe - Commission announces top experts to shape Horizon Europe (2021-2027) missions https://t.co/5s7twEGfG4 #paper pic.twitter.com/YPw6s3cUqX

— Wladek Grabinski (@wladek60) August 1, 2019

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August 01, 2019 at 12:18PM
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