Feb 28, 2024

[paper] La:HfO2 gate stacked ferroelectric tunnel FET

Neha Parasa, Shiromani Balmukund Rahib, Abhishek Kumar Upadhyayc,
Manisha Bhartid, Young Suh Songe
Design and analysis of novel La:HfO2 gate stacked ferroelectric tunnel FET
for non-volatile memory applications
Memories - Materials, Devices, Circuits and Systems
Volume 7, April 2024, 100101
DOI: 10.1016/j.memori.2024.100101

a Jawaharlal Nehru University, New Delhi, India
b Indian Institute of Technology, Kanpur, India
c X-FAB Dresden GmbH & Co. KG, Dresden, Germany
d National Institute of Technology, Delhi, India
e Korea Military Academy, Seoul, Republic of Korea


Abstract : Recent experimental studies have shown lanthanum-doped hafnium oxide (La:HfO2) possessing ferroelectric properties. This material is of special interest since it is based on lead-free, simple binary oxide of HfO2, and has excellent endurance property (1 × 109 field cycles without fatigue. There exists substantial information about the material aspects of La:HfO2 but it lacks proven application potential for CMOS-compatible low-power memory design. In this work, 10 % La metal cation fraction of HfO2 (La:HfO2) is proposed as the gate stack material in tunnel FET (TFET) for its potential as a memory device. 2D device simulations are carried out to show that the proposed ferroelectric TFET (FeTFET) provides the largest memory window (MW) as compared to present perovskite ferroelectric materials such as PZT, SBT (SrBi2Ta2O9) and silicon doped (4.6 % Si in HfO2) hafnium oxide (Si:HfO2). The larger window is attributed to greater polarization, and the calculation of MW is quantified by the shift in threshold voltage (Vth). The simulations carried out in this work suggest that La:HfO2 can be adopted as a potential ferroelectric material to target low-power FeTFET design at significantly reduced ferroelectric layer thickness.

FIG: Polarization phenomena of the proposed 
La:HfO2 gate stacked ferroelectric tunnel FET


[FOSSDEM 2024] Open PDK Initiative

FOSDEM 2024 was a two-day event organized by volunteers to promote the widespread use of free and open source software. Took place at the ULB Solbosch campus in the beautiful city of Brussels (Belgium), FOSDEM is widely recognized as the best FOSS conference in Europe.

There were two DevRooms to discuss the status and further FOSS CAD/EDA IC design tools developments and open PDK initiative:

FOSDEM'24 Inauguration Session

[paper] Fast-SPICE Circuit Simulation

A New Second Order Nonlinear Formulation for Fast-SPICE Circuit Simulation
A. Elhamshary1, Y. Ismail2, Y. A. Aziz3 and H. Ragae1
IEEE Access, DOI: 10.1109/ACCESS.2024.3367992

1 Electronics and Communication Engineering, Faculty of Engineering, Ain Shams University
2 Center Nanoelectronics and Device,
 American University, Cairo, Egypt
3 Department of Physics, School of Sciences and Engineering, the American University, Cairo, Egypt
*US patent pending USPTO Application #: 63/606,212


Abstract: A new second-order matrix formulation is proposed in this work to model any nonlinear electronic system. This new formulation is developed and implemented by using a recasting method that increases the number of variables but limits the non-linearity to a quadratic form. The nonlinearity is modeled without any approximation and can model complex nonlinearities such as exponential and Tanh-based models. The new quadratic method is applied to the extended Tanh MOSFET model and an exponential diode model to illustrate the power and reliability of this method. The method also has the advantage of directly stamping transistors and diodes into matrix forms in ways similar to linear elements. To demonstrate the validity of the new formulation, several circuits are examined, and the results compare very well to SPICE simulations. The simulation time as well as numerical stability improve significantly when using time marching techniques with the quadratic formulation as compared to directly stamping transistor and diode exponential nonlinearities.

Fig: Three-transistors circuit with C=10pF: a) the circuit diagram,
b) the output voltage results for the three transistors are on

Feb 14, 2024

Summer School on Organic Electronics and Neuromorphic Systems

June 17-20, 2024
will consist of a comprehensive set of classes aimed at doctoral or postdoctoral level researchers from both industry and academia. By means of a programme consisting of lectures, tutorials, advanced discussion groups, students will expand and refine their knowledge of organic materials, devices and circuits for microelectronics, as well as of neuromorphic devices and circuits with the world’s leading experts in these fields.

This Summer School is sponsored by the EU-funded BAYFLEX (Bayesian Inference with Flexible electronics for biomedical Applications) project. It is organized by the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV), in Tarragona. The Chair of the Summer School is Prof. Benjamin Iñiguez.

PhD students can present posters showing some of their results in a session on June 20 afternoon. Interested PhD students can submit short abstracts of the results they want to present in the Poster Session.

Invited Speakers

Mini-Colloquium: