[C4P] IEEE 18th LASCAS 2027 Panamá City

Call for Papers 

2027 IEEE 18th Latin America Symposium on Circuits and Systems 

LASCAS 2027 Panamá City, Panama

February 23-26, 2027

ieee-lascas.org/

LASCAS is the flagship symposium of the IEEE Circuits and Systems Society in Latin America. The 2027 edition will take place in Panamá City, a vibrant location known for the Panama Canal, Biomuseo, Amador Causeway, Ancon Hill, the ruins of Panamá Viejo, and the historic district of Casco Viejo.

Technical Areas

• Analog and Digital Circuits
• Mixed-Mode Circuits
• Biomedical Electronics
• Communication and RF Circuits
• Wireless Sensor Networks
• Nanoelectronics
• Electronic Design Automation
• VLSI Systems
• FPGA Design
• Circuit Testing and Fault-Tolerant Circuits
• Circuits for Space and Nuclear Applications
• Circuits for AI

Proceedings will be published by IEEE and available on IEEE Xplore. Selected best papers will be invited to special issues of the IEEE Open Journal of Circuits and Systems. Social activities and tourist tours will be organized for attendees and guests.

Organizing Committee

General Chairs

• Ivan Armuelles Voinov, Universidad de Panamá, Panama
• Fakhrul Zaman, Universiti Putra Malaysia, Malaysia

Program Chairs

• Rafaella Fiorelli Martegani, IMSE‑CNM, Spain
• Roberto La Rosa, STMicroelectronics, Italy
• Luis Estrada Petrocelli, Universidad Latina de Panamá, Panama

Important Dates

Paper Submission	September 1, 2026
Notification of Acceptance	October 23, 2026
Camera‑Ready	November 9, 2026

[ICMC] 2026 Award Winners

Thank you to all of the great paper and poster presentations at ICMC 2026!

Below the ICMC 2026 Best Paper Award Winners:

• Best Paper Award
  Zhengxing Zhang & Substitute Presenter Xu Wang
  Cadence Design Systems, Port Moody, Canada
  “Compact Time-Domain Modeling of Parameterized Frequency-Dependent Photonic Components in Verilog-A”
• Best Student Paper Award
  Tasnia Jahan
  Arizona State University, Tempe, USA
  “Physics-Informed Neural Networks for Predicting Characteristics of β-Ga2O3 based Devices”
• Best Poster Award
  Dylan Ma & Substitute Presenter Lan Wei
  University of Waterloo, Waterloo, Canada
  “Virtual-Source-Based Cryogenic FET Model”

and more ICMC2026 photos

[program] 16th AEC at INAOE

16th Advanced Electronics Congress

<https://www-elec.inaoep.mx/~SEA/2026/>

National Institute of Astrophysics, Optics and Electronics

Luis Enrique Erro No. 1, Tonantzintla, Puebla, México

September 09 - 11, 2026

The Electronics Coordination of INAOE proudly organizes its traditional Advanced Electronics Congress, now in its 16th edition, with the valuable support of the IEEE Electron Devices Society (EDS), the IEEE Instrumentation and Measurement Society (I&M Society), and the IEEE Puebla Section.

Since its inception in 2008, the Congress has aimed to bring together undergraduate and graduate students, researchers, and faculty members in Mexico with internationally recognized experts in the fields of microelectronics, nanoelectronics, integrated circuit design, high-frequency systems, communications, and instrumentation. Guided by this objective, the invited speakers present the most significant recent advances in their respective areas of expertise.

Throughout the Congress’s long history, the program has not only covered specialized topics related to these fields but has also embraced interdisciplinary perspectives in areas such as optics, agriculture, medicine, and a wide range of computer systems applications.

In addition, the Advanced Electronics Congress serves as a forum for interaction among colleagues and students, fostering interinstitutional collaboration and networking opportunities in alignment with the mission and international vision of the IEEE Societies within the IEEE Puebla Section

16th Advanced Electronics Congress Program
(September 09 - 11, 2026)

Wednesday, September 09th

Time	Topic	Speaker	Institute
08:00 - 09:00	Congress Registration
08:30 - 09:00	Inauguration
09:00 - 10:00	“Las herramientas que mueven el mundo”	Dr. Guy Paic	Instituto de Ciencias Nucleares (ICN), UNAM
10:00 - 11:00	“Desde la Ciencia de Frontera hasta el Desarrollo Tecnológico: Plataforma de Biosensado Multiespectral para Detección de Pesticidas”	Dra. Daniela Díaz Alonso	Ibero México, CD-MEMS INAOE
11:00 - 11:30	Break
11:30 - 12:30	“Diseño y caracterización de estructuras integradas para microondas”	Dra. Gabriela Méndez Jeronimo	CICESE, Ensenada, Baja California, Mexico, INAOE
12:30 - 13:30	“Modelado, prototipado y diseño ASIC para procesadores empleados en PLCs”	Dr. Carlos Alberto Hernández Gutiérrez	CINVESTAV, CDMX

Thursday, September 10th

08:00 - 09:00	Congress Registration
09:00 - 10:00	“Merging Smart Sensors, IoT, AI and Digital Twins Technologies for Digital Transformation in Agriculture”	Dr. Octavian Postolache	Instituto Universitario de Lisboa. Distinguished Lecturer IEEE Instrumentation and Measurement Society
10:00 - 11:00	“Electrodo de batería de ion litio a base de Silicio con recarga asistida por luz”	Dr. Enrique Quiroga González	Instituto de Física, BUAP
11:00 - 11:30	Break
11:30 - 12:30	“Aplicación del Control Predictivo a Convertidores CD-CD”	Dr. Germán Ardul Muñoz Hernández	BUAP, Tecnológico Nacional de México, Puebla.
12:30 - 13:30	“Exploring 22 nm FDSOI Transistors: Electrical Characterization, Reliability, and Temperature Effects”	Dra. Paulina Mariana Maya Hernández	INAOE

Friday, September 11th

08:00 - 09:00	Congress Registration
09:00 - 10:00	“Processor Validation in Industry in the Age of AI: Challenges, Innovations, and Career Opportunities”	Dr. Francisco Elías Rangel Patiño	Intel Guadalajara
10:00 - 11:00	“Space Mapping Design Optimization: Power in Simplicity Rooted in Engineering Practice”	Dr. José Ernesto Rayas Sánchez	ITESO en Guadalajara
11:00 - 11:30	Break
11:30 - 12:30	“Visión por Computadora, FPGAs y Sistemas Embebidos para solución de problemas AgroIndustriales”	Dr. Marco Aurelio Nuño Maganda	Universidad Politécnica de Victoria
12:30 - 13:30	“Integración de Sensores IoT y Realidad Aumentada para Sistemas Ciberfísicos”	Dr. Yehoshua Aguilar Molina	Universidad de Guadalajara, Centro Universitario de Los Valles
13:30 - 14:00	Closure

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Organizing Committee

• Dr. Juan Manuel Ramírez Cortés
• Dr. Roberto Stack Murphy Arteaga
• Dr. José de Jesús Rangel Magdaleno
• Dr. José Hugo Barrón Zambrano
• Dra. Ma. Teresa Sanz Pascual
• Dr. Mariano Aceves Mijares
• Dr. Daniel Durini Romero

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Contact

Valeria Rodríguez <vrdz@inaoep.mx>

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© INAOE/AGC 2026

[release] OpenCircuitX - Free VHDL/Verilog EDA Tool

OpenLabX Launches OpenCircuitX, 

a Free VHDL/Verilog EDA Tool

<https://github.com/openlab-x/OpenCircuitX>

OpenLabX founder Ahmad Kataranjee has announced the first public release of OpenCircuitX, a permissively licensed electronic design automation suite for VHDL and Verilog FPGA projects. “OpenCircuitX is a free, open-source EDA platform for VHDL and Verilog, the hardware description languages (HDL) used to design digital logic,” Ahmad explains. "It is developed by OpenLabX and unifies an IDE-quality HDL editor, a visual circuit canvas, an RTL schematic viewer, a waveform viewer, and a full FPGA toolchain in one window, for hardware engineers, students, and FPGA hobbyists alike.

“OpenCircuitX is built to grow from digital-only into a full EDA platform,” the developer continues, while admitting that at launch only the digital design domain is available with analog and mixed-signal domains planned to be added in later updates. Ahmad’s creation builds on existing open-source projects including the GHDL VHDL simulator, the Icarus and Verilator Verilog simulators, the Yosys open synthesis suite, nextpnr place and route, and openFPGALoader for board programming. “OpenCircuitX targets FPGA design ([Lattice Semiconductor] iCE40, ECP5),” Ahmad adds, “not ASIC tapeout. That’s not a limitation to apologize for, it’s the space where open-source EDA already works.”

The project’s source code is available on GitHub under the permissive MIT licence.

[read more: https://www.librecores.org/]

[release] IHP Open ADK

IHP Open Assembly Design Kit 

(#OpenAKD)

https://github.com/IHP-GmbH/IHP-Open-ADK

is preview ready and officially available on the IHP GitHub. This release comes with several tools to enable the workflow, including the IHP open source interposer technology process (OpenIntM4TM2). It is Assembly-level Design Kit (OpenADK) for heterogeneous chiplet integration. The OpenADK operates one abstraction layer above all process‑specific PDKs, providing the rule set and assembly tooling that define chiplet placement, routing, and interposer‑level connectivity. The interposer and the chiplet dies remain ordinary PDKs.

Status Warning ADK is currently a preview release only! v0.2.0. The KLayout assembly DRC, its runner, the KiCad DRU generator, and the IHP interposer adapter are implemented and exercised by the regression suite.

● Current ADK documentation

https://ihp-open-adk-docs.readthedocs.io/en/latest/index.html

● Quick start ADK commands

https://ihp-open-adk-docs.readthedocs.io/en/latest/quickstart.html