[workshop] Open Source Analog Chip Design

AT-C³ Training: Introduction to Open Source Analog Chip Design

SILICON ALPS Cluster

24-25 November 2026 

TU Graz, Campus Inffeldgasse

Inffeldgasse 33, 8010 Graz, Austria

This workshop is an excellent opportunity for engineers, researchers, and students who want to gain practical experience in open-source analog chip design and contribute to the emerging open-source semiconductor ecosystem.

About the Training

AT-C³ is launching one of its first hands-on training events, focused on a question that many electronic engineers are asking today: Can an analog integrated circuit be designed, simulated, laid out, and verified using only open-source EDA tools? During this two-day workshop, hosted by Symbiotic EDA, participants will answer this question through practical, hands-on experience. The training guides attendees through the complete analog IC design flow, from schematic capture to a verified physical layout, using modern open-source design tools.

Why Attend?

• Learn the complete open-source analog IC design workflow
• Gain hands-on experience with professional-grade EDA tools
• Explore schematic design, simulation, layout, and verification
• Network with engineers, researchers, and students interested in open-source chip design
• Discover the growing ecosystem around open-source silicon development

Registration Free of Charge

Organizer: SILICON ALPS Cluster

[paper] Cryo MOSFET Gate Capacitance

Sadık İlik, Masoud Babaie, Andrei Vladimirescu and Fabio Sebastiano

Characterization and Modeling of MOSFET Gate Capacitance Under Cryogenic Operation

IEEE Journal of the Electron Devices Society (2026)

DOI 10.1109/JEDS.2026.3745897

1 Delft University of Technology, 2628 CJ Delft (NL)

2 Qutech, 2628 CJ Delft (NL)

3 University of California at Berkeley, CA (US)

Abstract—The modeling of incomplete ionization is a key element for a reliable and scalable cryogenic transistor model. Despite the increasing interest in cryo-CMOS modeling, capacitance–voltage (CV) characteristics remain relatively unexplored, even though they are less sensitive to secondary effects, such as mobility variations, than DC measurements. While the experimental data in the literature are few and limited, a clear discrepancy is observed between model predictions and capacitance–voltage (CV) measurements. To address these limitations, this paper presents a new, accurate, and scalable capacitance model including an incomplete ionization model that predicts cryogenic behavior more accurately than existing models, along with a corresponding charge model derived from the proposed formulation. The model accurately reproduces all CV features, including the field-dependent ionization–induced flatband voltage dip, the depletion-region capacitance, the trap related threshold voltage humps, and the inversion region. Extensive CV characterizations over multiple device geometries, frequencies, AC excitation voltages, and temperatures are finally used to validate the model.

Fig: Inversion capacitance at 4.2 K for PMOS (a)–(d) and NMOS (e)–(h) devices with varying geometries. In (a), (b), (d), (e), (f), and (h), identical small-sized devices are connected in parallel to enable characterization with sufficient SNR.

[Open Hardware] CfP: FOSDEM 2027 Open Hardware and CAD/CAM Devroom

The Open Hardware and CAD/CAM "devroom" at FOSDEM 2027

is an opportunity for developers of Open Hardware projects and related software tools to gather and share their work, meet developers from other projects, network, and learn from one another.The 2027 devroom is once again being coordinated by Chris Hennes (@chennes, chennes@freecad.org) and Jo Hinchliffe (@concretedog, jo@concretedog.xyz). We carry on the tradition developed over the many years of this DevRoom's existence of a dynamic, interactive room full of interesting presentations and projects.

Call for Participation 

 We are pleased to announce the CfP for the Open Hardware and CAD/CAM devroom at FOSDEM 2027, 30 & 31 January 2027 in Brussels, Belgium. The devroom will take place on Sunday 09:00–13:00, 31 January 2027 at [ULB (Campus Solbosch)]. We hope you'll join us for a half day of talks, demos and interesting discussions on designing, modeling and testing hardware using Open Source tools. We welcome any talk proposals about the design and creation of physical objects. Topics of interest include, but are not limited to: 

- Open Hardware Projects 

* Open circuits 

* Product design 

* The business of open hardware 

- Circuit Design

* Printed circuit board design tools 

* Circuit simulation 

- 3D modeling and analysis

* Solid modeling tools

* Meshing, modeling and transforming physical representations

* Finite element analysis 

- 3D printing

* 3d slicing tools 

* Motor control 

- Machine design and integration

* Open Hardware projects

* ECAD/MCAD integration

* Thermal analysis

* Wire modeling 

- Physical Model Data storage

* Data representation and optimization

* Version control in hardware data storage

* Collaborative and team-based hardware design techniques 

Talk slots will be 20 minutes **total**, inclusive of time for questions. Presenters are encouraged to plan to speak for about 15 minutes, to ensure enough time for what is often a very lively Q&A segment. Note that this is shorter than previous years, since the 2027 edition is only a half day: talk fast! 

Important Dates 

* Submission deadline: 4 December 2026 

* Acceptance notifications: 11 December 2026 

* Final schedule announcement: 14 December 2026 

* Devroom: Sunday 31 January 2027 ## The submission process 

Please submit your proposal at the FOSDEM pretalx site before 4 Dec 2026. Select the "Open Hardware and CAD/CAM" session. Please note that the "Open Source Design" track, while a lovely group of wonderful hackers, is not the same. 

Please include the following information with your submission: 

- Abstract 

- Speaker bio 

- Link to any hardware / code /slides for the talk 

 

Fill in at least a title and abstract for the proposed talk. Keep in mind that much of the value in these meetings comes from the discussions, so please allot at least 20% of the talk time for questions and answers. 

Questions? 

If you have any questions or need guidance on any aspect of submitting, preparing or presenting, please e-mail channels at freecad.org. 

Volunteering 

If you are interested in helping the devroom run smoothly, please reach out to Chris Hennes (@chennes) or Jo Hinchliffe (@concretedog) and we'll be very happy to have your assistance! 

Recordings 

The talks will be recorded and live-streamed during FOSDEM'27. The recordings will be
published under the same licence as all FOSDEM content (CC-BY-4.0). Only presentations and
Q&A will be recorded, not informal discussions and whatever happens during breaks between
presentations. We require affirmative consent to this license. 

Please include the following statement in your submission notes: `

`` If my presentation is accepted for FOSDEM, I hereby agree to license all recordings, slides, and other associated materials under the Creative Commons Attribution Share-Alike 4.0 International License. Sincerely, <NAME> ``` 

Chris Hennes (@chennes)
The FreeCAD Project Association AISBL
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TSMC Europe OIP Ecosystem Workshop

Meet Dolphin Semiconductor at  TSMC Europe OIP Ecosystem Workshop Book a meeting! 📅 November 24, 2026 📍 Booth, Hilton Munich Airport, Germany   Come to our booth to learn how our TSMC-based, ultra-low-power, and smart IP solutions can shorten your design cycle and thus accelerate your Time-to-Market.   Book a meeting with us now to secure a dedicated slot before the show fills up. We look forward to seeing you at TSMC Open Innovation Platform Ecosystem Forum and sharing a glimpse into the future of our technology with you!

[chipfoundry] December Shuttle (CI2612)

Commitment and 50% payment due November 4. Tapeout December 7. Plus new drop-in analog IP for your design.‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­‌   ­

Hello , A quick reminder that the December 2026 chipIgnite shuttle (CI2612) is coming up fast, and the commitment deadline is now about two weeks away.   Key dates November 4, 2026: Commitment deadline (50% payment due) December 7, 2026: Tapeout submission   If you already have a reservation, now is the time to lock in your spot. If you are still deciding, get in touch and we will help you scope your design for this run. Secure Your December Spot New: Commercial IPs now available on the marketplace The commercial analog and mixed-signal blocks we previewed in August are now live on the ChipFoundry marketplace for SkyWater 130nm. You can install them with ipm and drop them straight into your December design.   Highlights include: Data converters: 12-bit SAR ADC, delta-sigma modulator ADC, 8-bit voltage/current DAC Clocking: 100 MHz system PLL, 24 MHz RC oscillator, crystal oscillator interface Power and reference: 1.8 V LDO, bandgap reference, voltage monitor, POR sequencer Signal chain: Class AB amplifier, continuous-time comparator, high-Z input buffer, analog mux, switched-capacitor filter   Each block comes with abstract views for place-and-route, and ChipFoundry substitutes the full protected layout at tapeout, so you integrate it like any other macro. Browse the IP Catalog Questions about adding an IP to your December tapeout? Just reply to this email or contact us at info@chipfoundry.io. We are here to help.   Best regards, The ChipFoundry Team ChipFoundry You've received it because you've subscribed to our newsletter. Unsubscribe