[mos-ak] [Final Program] MOS-AK LatAm Webinar, Dec. 12, 2025

Arbeitskreis Modellierung von Systemen und Parameterextraktion

Modeling of Systems and Parameter Extraction Working Group

MOS-AK LatAm Workshop

(online), Dec. 12, 2025

The End‑of‑Year MOS-AK Workshop/Webinar on Compact/SPICE Modeling will be held online on Dec. 12, 2025. We invite you to join this webinar to learn from the experts in Compact SPICE modeling, Verilog‑A standardization, and FOSS CAD/EDA IC design support for OpenPDKs, internationally, with particular focus on Latin America

Venue: MOS-AK LatAm (Webinar)
Online Webinar Access Link: https://meet.jit.si/MOS-AK_LA_2025

• Final Workshop Program: Dec. 12 2025
San Francisco, 09:00 - 11:00
Rio de Janeiro, 14:00 - 16:00
Geneve, 18:00 - 20:00

T_1	OpenPDK LatAm Krzysztof Herman IHP (D)
T_2	AI/ML-Driven Device Modeling for Advanced Nodes, RF and Power Applications Fahad Usmani Keysight Technologies (US)
T_3	Design and Integration of Multiple Open-Source Analog Circuits Fabricated in SKY130 Technology within Silicluster v2 Uriel Jaramillo Toral* Hector Emmanuel Muñoz Zapata and Susana Cisneros Ortega CINVESTAV (MX)
T_4	SemiCoLab, A Multi-Project ASIC Platform for Democratizing Chip Design Emilio Baungarten, Susana Ortega, Miguel Rivera, and Francisco Javier CINVESTAV (MX)
T_5	Building an Ecosystem Through IC Education in Colombia: A Model for Emerging Semiconductor Regions Juan Sebastián Moya Baquero SymbioticEDA
T_6	Silicon-Proven Learning With OpenPDKs and MPW Access for IC Education Eduardo Holguin Weber Universidad San Francisco de Quito (EC)
T_7	OpenPDK Mismatch Testchip Juan Pablo Martinez Brito CEITEC S.A. (BR)
T_8	Physics-Based Modeling and Charge Density Saturation in GaN/AlGaN MOS-HEMTs Ashkhen Yesayan, Farzan Jazaeri, Jean-Michel Sallese EPFL (CH)

W.Grabinski for Extended MOS-AK Committee

WG111225

--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To view this discussion visit https://groups.google.com/d/msgid/mos-ak/CALp-Rj-q_4QUTNK4hvPjVEQwKK-4msFgAX7LeuGFHCDeRs_6pA%40mail.gmail.com.

[paper] Noise Propagation and Statistic Variability in MOSFETs

Raphael Chatzipantelis, Loukas Chevas, Nikolaos Makris and Matthias Bucher

Noise Propagation and Statistic Variability in MOSFETs Using Probability Density Functions

Fluctuation and Noise Letters (Accepted Paper)

DOI: 10.1142/S0219477525400255

1) School of Electrical and Computer Engineering, Technical University of Crete, Chania 73100, Greece
2) Foundation for Research and Technology Hellas, Heraklion 70013, Greece,

Abstract: Probability density functions using stochastic methods are shown to be an effective tool in the context of MOSFET noise and variability modeling. These methods are employed here in the context of the charge-based EKV MOSFET model. As an example, a Gaussian noise density function applied at the gate or the source of a MOSFET causes a corresponding drain current noise density function, which may be expressed analytically as a function of inversion coefficient only. The same expression may be used to model drain current variability due to MOSFET parameters such as threshold voltage. Furthermore, the method is extended to variations of quantities such as transconductance and transconductance-to-current ratio. The method shows promise in variability modeling of MOSFETs and may complement traditional approaches.

FIG: Comparing the traditional ”small-signal” transconductance method with the stochastic PDF method for 𝑖𝑓, derived from the charge-based model, where in both cases the same noise (or variability) at the gate is applied (𝑉𝐺= 87mV, 𝜎𝑉𝐺=10mV), centered at 𝑖𝑓=2, showing slightly different mean and ±3𝜎 values, while the tail distributions differ significantly.

Acknowledgements: The authors gratefully acknowledge Dr. Predrag Habas from EM Microelectronic S.A. for valuable discussions and wafers for noise and statistical analysis. This work was partly funded by the European Union, and by Greek National funds, under the topic DIGITAL- Chips-2024-SG-CCC-1 - Competence Centers, Project No 101217803 - HCCC.