Adding Spice to Your Workbench https://t.co/TI79vLiaOO #todo #feedly #papers

Adding Spice to Your Workbench https://t.co/TI79vLiaOO #todo #feedly #papers

— Wladek Grabinski (@wladek60) February 27, 2016

from Twitter https://twitter.com/wladek60

February 27, 2016 at 11:41PM
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CMOS-SOI-MEMS Thermal Antenna and Sensor for Uncooled THz Imaging https://t.co/PiU56kluPf #papers #feedly

CMOS-SOI-MEMS Thermal Antenna and Sensor for Uncooled THz Imaging https://t.co/PiU56kluPf #papers #feedly

— Wladek Grabinski (@wladek60) February 27, 2016

from Twitter https://twitter.com/wladek60

February 27, 2016 at 11:12PM
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Electrical Characterization of FDSOI by Capacitance Measurements in Gated p-i-n Diodes https://t.co/HtDcvhqiF1 #papers #feedly #papers

Electrical Characterization of FDSOI by Capacitance Measurements in Gated p-i-n Diodes https://t.co/HtDcvhqiF1 #papers #feedly #papers

— Wladek Grabinski (@wladek60) February 27, 2016

from Twitter https://twitter.com/wladek60

February 27, 2016 at 01:32PM
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An Experimental Demonstration of GaN CMOS Technology https://t.co/9Q50HGFkni #papers

An Experimental Demonstration of GaN CMOS Technology https://t.co/9Q50HGFkni #papers

— Wladek Grabinski (@wladek60) February 26, 2016

from Twitter https://twitter.com/wladek60

February 26, 2016 at 10:57PM
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Subthreshold Kink Effect Revisited and Optimized for Si Nanowire MOSFETs https://t.co/9Q50HGFkni #papers

Subthreshold Kink Effect Revisited and Optimized for Si Nanowire MOSFETs https://t.co/9Q50HGFkni #papers

— Wladek Grabinski (@wladek60) February 26, 2016

from Twitter https://twitter.com/wladek60

February 26, 2016 at 10:50PM
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Negative Capacitance Field Effect Transistor With Hysteresis-Free Sub-60-mV/Decade Switching https://t.co/9Q50HGFkni #papers

Negative Capacitance Field Effect Transistor With Hysteresis-Free Sub-60-mV/Decade Switching https://t.co/9Q50HGFkni #papers

— Wladek Grabinski (@wladek60) February 26, 2016

from Twitter https://twitter.com/wladek60

February 26, 2016 at 10:37PM
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Keysight: Full SPICE Characterization Flow

Keysight Technologies offers half a daya seminar at IEMN, Villeneuve d’Ascq. This free seminar is an opportunity to discover "Full SPICE Characterization Flow". The content is open, based on practical industrial and academic examples to illustrate the features of Keysight CAD/EDA software tools:

• Introduction (20 min)
• Part 1 - Measurements Automatization (30 min)
• Express WaferPro
• Part 2 - Spice Model Extraction  (60 min)
• IC-CAP
• MBP 
• Part 3 - Quality Assurance Model (20 mins)
• MQA 
• Q/A Session (20 min)

Place: Grand Amphithéâtre de l’IEMN, Laboratoire Centrale, Avenue Henri Poincaré F-59491 Villeneuve d’Ascq (F)
Date 17 March 2016

[Register online]

LibreCAD: Call for Your POTM Vote

The vote for April 2016 Community Choice SourceForge Project of the Month is now available, and will run until March 15, 2016 12:00 UTC. Here is one of the candidates:

LibreCAD is a fully comprehensive 2D CAD application that you can download and install for free. LibreCAD is an Open Source community-driven project: development is open to new talent and new ideas, and our software is tested and used daily by a large and devoted user community; you, too, can get involved and influence its future development. LibreCAD has GPLv2 public license – you can use it, customize it, hack it and copy it with free user support and developer support from our active worldwide community and our experienced developer team. There is a large base of satisfied LibreCAD users worldwide, and it is available in more than 20 languages and for all major operating systems, including Microsoft Windows, Mac OS X and Linux, including Debian, Ubuntu, Fedora, Mandriva, Suse, etc. 

Download LibreCAD now.

Alliance: FOSS VLSI/CAD System

Alliance is a complete set of free cad tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. A complete set of portable CMOS libraries is provided. Alliance is the result of a twelve year effort spent at SoC department of LIP6 laboratory of the Pierre & Marie Curie University (Paris VI, France). Alliance has been used for research projects such as the 875 000 transistors StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL Router.

Alliance VLSI CAD System is free software. Binaries, source code and cells libraries are freely available under the GNU General Public License (GPL). You are welcome to use the software package even for commercial designs without any fee. You are kindly requested to mention: "Designed with Alliance © LIP6, Université Pierre et Marie Curie".

ICs Designed with Alliance

• Smartlabs/Smarthome designed a complete circuit in the XFAB XH035 technology (2014).
• Tokai University (Shimizu Lab) designed the SNX, a 16 bits processor in the ROHM 0.18µm (2010).

Useful Links

• Improved Standard Cell libraries and documentation on how to design them, by Graham Petley: VLSI Technology
• A book presenting Alliance in depth: Introduction to VLSI CMOS Circuits design by Carlos SilvaCardenas, Takeo Yoshida & Alberto Palacios Pawlovsky.
• For Spanish readers, a set of tutorials made by Miguel Eduardo Flores Gomez from Don Bosco University: Tutorial de Alliance

[read more...]

[video] How to Model RF Passive Devices: Spiral Inductors

How to Model RF Passive Devices: Spiral Inductors

With increasing operating frequencies, the modeling of passive components becomes increasingly important, and there exist no ready-to-use models for inductors, resistors, capacitors etc. Based on the other video of this fundamental device modeling series, (How to Model RF Capacitors and Resistors), this video extends the topic to modeling RF Spiral Inductors. It explains how to develop a Spice model based on verified S-Parameter measurements. Applying an easy to follow, step by step procedure, the video walks you through the entire modeling flow for on-wafer inductors, using the Keysight Measurement and Modeling Software IC-CAP.

The IC-CAP project (modeling spiral inductors with and without metal-1 shielding) can be downloaded together with a detailed pdf explaining the steps demonstrated in the video.

To download the project files referred to in this video visit:
http://www.keysight.com/find/eesof-how-to-model-spiral-inductors

Published on Feb 11, 2016

Tin Oxide: The First Stable p-type #2D #Semiconductor Material https://t.co/mKQ9vHsbrJ #papers #feedly

Tin Oxide: The First Stable p-type #2D #Semiconductor Material https://t.co/mKQ9vHsbrJ #papers #feedly

— Wladek Grabinski (@wladek60) February 18, 2016

from Twitter https://twitter.com/wladek60

February 18, 2016 at 07:59AM
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#TFETs may #challenge MOSFETs https://t.co/9tyWFYJprp #cad #feedly #papers

#TFETs may #challenge MOSFETs https://t.co/9tyWFYJprp #cad #feedly #papers

— Wladek Grabinski (@wladek60) February 10, 2016

from Twitter https://twitter.com/wladek60

February 10, 2016 at 12:46PM
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Obama makes risky bid to increase #science #spending https://t.co/ckzMvs97eb #papers #feedly

Obama makes risky bid to increase #science #spending https://t.co/ckzMvs97eb #papers #feedly

— Wladek Grabinski (@wladek60) February 10, 2016

from Twitter https://twitter.com/wladek60

February 10, 2016 at 07:57AM
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MIXDES 2016 Paper Submission Deadline

MIXDES Paper Submission Deadline
(March 1st, 2016)

---------- Forwarded message ----------
From: MIXDES 2016 Organizing Committee

Dear Colleagues,

I would like to kindly remind you that paper submission for MIXDES 2016 Conference has been already opened. The deadline for regular paper submission is March 1st, 2016, so I encourage you to register your papers. The instruction for paper preparation is available online. Please note that the paper format and content may be still updated up to Final Paper Version deadline (May 31st, 2016).

This year the MIXDES 2016 Conference will take place in Lodz, Poland, June 23-25, 2016. For more information regarding the conference please visit the MIXDES 2016 Conference web site at
www.mixdes.org.

If you have any questions please do not hesitate to contact me.

Hoping to see you in Lodz,

Mariusz Orlikowski
Secretary of the 23rd International Conference
"Mixed Design of Integrated Circuits and Systems"
MIXDES 2016
http://www.mixdes.org

Device to GDSII for IC Design Training

Hands on Training Program on “Device to GDSII for IC Design”

on 22-27 Feb 2016

Organized by VLSI Division of School of Electronics Engineering

Vellore Institute of Technology, Near Katpadi Rd Vellore, Tamil Nadu - 632014

The relentless march fast of the CMOS has slowed down and the semiconductor industry is looking for novel and innovative devices. Many novel devices are being explored currently. TCAD and Cadence tool allows us to generate new structures, circuits and analyze its performance. Unlike other circuit simulators, TCAD and Cadence needs a special training. This hands on training addresses this gap.

Target Audience: Faculty, students and research scholars from various engineering colleges of India. The number of participants is limited to 40. 

Topics to ďe addressed:

Using TCAD:

• Structure Creation, Simulation and Device Simulation 
• Process Simulation 
• Multi-gate Transistors 
• Radiation study on devices and circuits

Using Cadence: 

• RTL Design and Simulation 
• Synthesis and low power synthesis Using RTL Compiler 
• Physical aware synthesis and DFT 
• Block and Top Level P&R Using SOC Encounter 
• STA Using Timing Engine 

[read more...]

Advanced Test Engineering Course

Barcelona, Spain

February 15-16, 2016 (2 days)

The course will highlight board and system-level manufacturing test and supportability issues. In order to achieve the unambiguous isolation of the faulty circuits, testability has to be assessed at the design stage – often before the circuit details are known. We will examine how this can be achieved using diagnostic assessment and modeling techniques. Finally, the course will evaluate the value of DFT and BIST at all levels of assembly from an economic perspective. You will leave the course with a thorough understanding of techniques, and guidelines you can put to use right away to manage automatic test and ATE at your company. The DFT and BIST methods will profit both manufacturing and support, while at the same time greatly improve the quality of units under test UUTs.

Who should attend: This course is not only of interest to designers and test engineers, but it will also be of great value to reliability, logistics, quality and manufacturing engineers. Managers concerned with testability and BIST techniques as part of DFX, as well as those with general interest of IEEE and military standards in DFT should find this course a great value.

Instructor: Louis Y. Ungar; Details and Availability [read more...]

Simulating the World’s Smallest Integrated Switch

This visualization from CSCS in Switzerland shows the world’s smallest integrated switch.

The switch is based on the voltage-induced displacement of one or more silver atoms in the narrow gap between a silver and a platinum plate.

Researchers working under Juerg Leuthold, Professor of Photonics and Communications at ETH Zurich, have created the world’s smallest integrated optical switch. Applying a small voltage causes an atom to relocate, turning the switch on or off. ETH Professor Mathieu Luisier, who participated in this study, simulated the system using Piz Daint Supercomputer. The component operates at the level of individual atoms. The team’s latest development was recently presented in the journal Nano Letters.

gEDA Edinburgh meetup - Saturday 6th February 2016

gEDA Edinburgh Meetup

Saturday 6th February 2016

---------- Fwd message ----------
From: "Peter TB Brett"
Date: 3 Feb 2016 13:57
Subject: gEDA Edinburgh meetup - Saturday 6th February 2016 
----------

Hi all,
There will be a UK meet-up and hack day this weekend.

• Edinburgh, UK
  Saturday 6th of February

It'll be at my place, so if you want to come, send me a direct e-mail and I'll send details by private e-mail.

Sorry for the short notice. It's on Saturday so as not to conflict with the PCB hack day on Sunday.

Peter Clifton and I will both be there, and everybody else who can attend for all or some of the day will be welcome. We'll also be using the #geda channel on irc.oftc.net

If you use or develop free and open source system (FOSS) design and simulation software, you'd be welcome to attend!

Peter

---------- End of Fwd message ----------

Free Computational Electromagnetic Modeling Codes

The software in this list is either free or available at a nominal charge and can be downloaded over the internet. Some of the codes require the user to register with the distributor's web site. If you are familiar with other free EM modeling software that that should be added to this list, please send the name of the software, a hypertext link, and a brief description to CVEL-L@clemson.edu.

This page has been translated into Italian here, Serbo-Croatian here, Slovakian here, Swedish here and Polish here and here.

(Page last update: December 14, 2015 )

ASAP - Antenna Scatterers Analysis Program
AtaiTec Free 2D Field Solver
ATLC - Arbitrary Transmission Line Calculator
ATLC2 - Arbitrary Transmission Line Calculator 2
emAnalyze
EMAP
EMCoS Antenna VLab SV
EM Explorer
emGine Environment
ERMES
FastCap and FastHenry
FEKO LITE
FEMM - Finite Element Method Magnetics
gprMax
MagNet (Infolytica)
MMANA-GAL (basic version)
MEEP
MMTL
Multiple Multipole (MMP) Algorithms
NEC2
newFasant (student version)
openEMS
pdnMesh
Puma-EM
Qsci
Radia
SATE Static Field Analysis Toolkit (Educational)
Students' QuickField
Sonnet Lite
Trace Analyzer

Funding the Costs of Open Access Publishing

The EC FP7 Post-Grant Open Access Pilot:
Funding the Costs of Open Access Publishing

This blogpost was aimed to provide a background to the discussion on Open Access held at the now cancelled Nov 26-27th Euraxess-Voice of the Researchers conference in Brussels. The barbarians may have succeeded in sabotaging a unique opportunity for civilized discussion on how to achieve progress through research, but they will not stop our building the absolute opposite to what they represent.

A new funding initiative has been launched by the European Commission earlier this year in order to fund the Open Access publishing fees for publications arising from post-grant FP7 projects. This 2-year initiative, called the FP7 Post-Grant Open Access Pilot and being implemented under the OpenAIRE project, has a 4m euro budget to cover Article Processing Charges (APCs) for journal articles (and BPCs for books) stemming from FP7 projects finished no longer than two years ago at the time a manuscript is accepted for publication. This means that over 8,000 FP7 projects are eligible for funding at the moment, and currently running ones will become eligible as they reach their end-date [read more...]

Posted by diamartin| November 26, 2015

Guest post by Pablo de Castro, LIBEROpen Access Project Officer

Academics across Europe join #Brexit debate https://t.co/bfj7efwNu3 #papers #feedly

Academics across Europe join #Brexit debate https://t.co/bfj7efwNu3 #papers #feedly

— Wladek Grabinski (@wladek60) February 3, 2016

from Twitter https://twitter.com/wladek60

February 03, 2016 at 02:24PM
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Summery Tarragona https://t.co/oeqHdoZOcl #papers #art #feedly

Summery Tarragona https://t.co/oeqHdoZOcl #papers #art #feedly

— Wladek Grabinski (@wladek60) February 2, 2016

from Twitter https://twitter.com/wladek60

February 02, 2016 at 10:59AM
via IFTTT

MNF2016 CALL FOR ABSTRACTS

MNF2016 

CALL FOR ABSTRACTS 

(Extended Deadline to 8 April 2016)

Following numerous requests, we [MNF TPC] have decided to base the proceedings on extended abstracts (of 1-2 pages length) instead of longer proceedings papers. You are not requested to submit a 6-8 pages proceedings paper now.

Those of you who have already submitted your abstracts have the opportunity to extend them to 2 pages to include 1 or 2 figures or tables, if you so wish.

We will keep the abstract submissions open now until the 8 April 2016. Again, submissions need to be pdfs. The extended abstracts should follow the formatting guidelines given in the proceedings paper template given on the webpage.

[read more]

January’s #FOSS Top Ten https://t.co/O8kFAuzCvR #opensource #feedly

January’s #FOSS Top Ten https://t.co/O8kFAuzCvR #opensource #feedly

— Wladek Grabinski (@wladek60) February 1, 2016

from Twitter https://twitter.com/wladek60

February 01, 2016 at 10:44AM
via IFTTT

#GPIO #Zero and Raspberry #Pi programming starter projects https://t.co/L8pcIPyInw #opensource #feedly

#GPIO #Zero and Raspberry #Pi programming starter projects https://t.co/L8pcIPyInw #opensource #feedly

— Wladek Grabinski (@wladek60) February 1, 2016

from Twitter https://twitter.com/wladek60

February 01, 2016 at 10:43AM
via IFTTT