Dec 23, 2022

[https://t.co/duNVklIjpY] #TSMC in talks to build first #Europe #chip plant #waferfab in Germany #semi #manufacturing https://t.co/DK9G7NKu3c

[https://t.co/duNVklIjpY] #TSMC in talks to build first #Europe #chip plant #waferfab in Germany #semi #manufacturing https://t.co/DK9G7NKu3c
— Wladek Grabinski (@wladek60) Dec 23, 2022

from Twitter https://twitter.com/wladek60

December 23, 2022 at 01:29PM
via IFTTT

Dec 20, 2022

A strategy to monitor #spin-orbit #torque #switching and exchange bias over time https://t.co/0EidL5jFTa #semi https://t.co/d2IBPIZK7v

A strategy to monitor #spin-orbit #torque #switching and exchange bias over time https://t.co/0EidL5jFTa #semi https://t.co/d2IBPIZK7v
— Wladek Grabinski (@wladek60) Dec 20, 2022

from Twitter https://twitter.com/wladek60

December 20, 2022 at 08:22PM
via IFTTT

[OpenVAF] Next-Generation Verilog-A Compiler

OpenVAF is a Next-Generation Verilog-A compiler

that empowers the open source silicon revolution

Roadmap: OpenVAF is still in development and there many goals we aim to achieve in the longterm:

Noise analysis (planned for 2023)
Reaching full compliance with the Verilog-A standard
Behavioral modelling features
Support for features that allow defining full circuits/full PDKs in Verilog-A
OSDI integration in Xyce
Improved documentation
A detailed paper about the technical innovations in OpenVAF and attendance at international conferences

We, OpenVAF Developers, are always looking for cooperation partners, please do not hesitate to contact SemiMod GmbH.

Circuit simulators play a critical role in the design of electrical circuits. Accurate simulations enable circuit designers to validate circuit behavior before actual fabrication happens, potentially saving significant re-design costs. The simulation of a circuit critically depends on the so-called compact models and therefore:

The accuracy of the compact-model equations
The quality of the model parameters

Compact models predict the device terminal characteristics by means of computationally inexpensive equations. With increasingly advanced technologies, compact models have been growing significantly in complexity. At the same time an increasingly diverse set of technologies is offered to designers, requiring specific compact models for each kind of electron device.
The complexity of compact models has made the manual integration into simulators a tedious, error-prone and therefore expensive task. One reason for this is that not only the model equations have to be implemented, but also their symbolic derivatives. Numeric derivatives are not an option because they are orders of magnitude slower to compute than analytical derivatives and can introduce convergence problems due to inaccuracies. It is not uncommon - even in commercial tools - to find model implementation bugs or to observe convergence problems that result from incorrectly implemented derivatives. Some simulators with no or limited Verilog-A integration do not implement certain compact-models and can therefore not be used to simulate some processes at all.
Manually implemented compact models may differ between simulators since EDA vendors often rename parameters or alter particular model equations. Due to these simulator specific peculiarities, PDKs can usually only be used by a few specific simulators.

Verilog-A has been developed to address these problems and has become the de-facto standard for developing and distributing compact models. It allows implementing compact models via a simulator independent and standardized language. Verilog-A compilers can translate these models to machine code and allow simulators to use these models without manually implementing them. Verilog-A enables:

model development and customization by allowing to quickly modify the model equations without having to worry about model implementation details.
implementing behavioral or data-driven models, or even entire circuits.
inherent portability between simulators for both models and PDKs that would not be possible with traditional netlist-based formats.

Model development and customization is necessary for advanced technologies and applications, for example quantum computing, where existing models cannot provide satisfactory results and must be adjusted. It also enables research and development.

[read more at <https://openvaf.semimod.de/>]

Dec 19, 2022

ED Spain Chapter Online Mini MQ: 75 YEARS OF TRANSISTOR

ONLINE MINI-COLLOQUIUM: 75 YEARS OF TRANSISTOR

Department of Electronic, Electrical and Automatic Control Engineering,

University Rovira i Virgili

Tarragona, Catalonia, Spain

Chair: Benjamin Iñiguez, EDS BoG Member and Vice-Chair of EDS Region 8,
Lluís F. Marsal, EDS BoG Member and Chair of the ED Spain Chapter

Tuesday, January 26, 2023 (in-person and online)

10:20-10:30 Overview, Benjamin Iñiguez

10:30-11:10 Journey through Three Magical Months 75 years ago: Transistor Invention,
Manoj Saxena (Uni. Delhi, India), online talk
11:10-11:50 The SOI Transistor,
Sorin Cristoloveanu (INP, Grenoble, France), in-person and online talk
11:50-12:30 History and Evolution of TCAD/EDA Tools Towards FOSS Applications,
Wladek Grabinski (GMC, Switzerland), online talk

12:30-12:40 Closing remarks, Benjamin Iñiguez

Dec 16, 2022

[Registration Now Open] IFS2023 Annual Semiconductor Industry Update Webinar

IFS2023 Annual Semiconductor Industry Update Webinar

Registration Now Open

How long will the current industry downturn last? How broad and how deep will it be? How can I gain a strategic advantage over my peers? What fate now awaits the industry in 2023-24? Find out the answer to these and other key questions at Future Horizons' IFS2023 Annual Semiconductor Industry Update Webinar, Jan 17, 2023 - 3pm UK GMT: https://us02web.zoom.us/webinar/register/2616691487856/WN_xYEvDlkzTaejlUeyqI-_6g

Why? Founded in 1989, Future Horizons' track record and industry experience makes this a must-attend event for key decision makers in the semiconductor, electronics and all related industries. We always present accurate and insightful analysis at these events backed up by sound data

What You Will Learn
This one-hour broadcast will focus on the chip industry outlook, including:
• How long and how deep will the market bust be
• What is the market outlook for 2023-24
• What are the exposures, vulnerabilities, opportunities, losers and gainers
• What will be the likely downturn repercussions
• How to build resilient strategies and business models

Who Should Attend?
• All companies, small and large, from startups to established market leaders
• Key decision-makers engaged in the design, manufacture, or supply of semiconductors
• Government organisations involved in trade and investment
• Those involved in investing or banking within the electronics industry
• Senior marketing executives planning future marketing strategy

Why Future Horizons?
We have been in the business of forecasting and analysing the semiconductor market for over 56 years and have been a trusted advisor to governments, investors and most of the top global semiconductor firms. Time and time again we have delivered sound advice and saved our clients time and money with our forensic and accurate analysis of the industry.

For a small investment of £150 plus £30 UK VAT you will gain accurate industry insight to make good strategic decisions in these uncertain times
• Discount available for 3 or more attendees from the same company/organisation

Can't Attend?
• Order the webinar material only
• Please pass to a colleague if already attended or not suitable for you
• This event can also be held in-house for your added convenience and flexibility

Sign Up NOW!
Don't miss out, sign up now here: https://us02web.zoom.us/webinar/register/3916691497570/WN_xYEvDlkzTaejlUeyqI-_6g

Malcolm Penn, Chairman & CEO

Social Media
Follow us on Twitter, like us on Facebook and join our Linked In Group and receive regular industry news, information and comments.
Registered Company: 4380991

Dec 14, 2022

#Taiwan invests EUR10 million in #Lithuania and provides #semi scholarships to #Central and #Eastern #Europe students https://t.co/QUaoMnHzSb https://t.co/L1Dj8QlHbo

#Taiwan invests EUR10 million in #Lithuania and provides #semi scholarships to #Central and #Eastern #Europe students https://t.co/QUaoMnHzSb https://t.co/L1Dj8QlHbo
— Wladek Grabinski (@wladek60) Dec 14, 2022

from Twitter https://twitter.com/wladek60

December 14, 2022 at 01:09PM
via IFTTT

#China readying a more than 1 trillion yuan package for #semi #chip firms in face of US curbs https://t.co/Z3Il0L29VI https://t.co/lr1QuQbEsm

#China readying a more than 1 trillion yuan package for #semi #chip firms in face of US curbs https://t.co/Z3Il0L29VI https://t.co/lr1QuQbEsm
— Wladek Grabinski (@wladek60) Dec 14, 2022

from Twitter https://twitter.com/wladek60

December 14, 2022 at 11:44AM
via IFTTT

Dec 8, 2022

[book] Circuit Simulation and Modeling with Phyton

Circuit Simulation and Modeling with Phyton

Hardcover – April 9, 2021

by Kenji Mori (author), Akira Matsuzawa (author)

This book is written for people who are learning Python. Circuit simulation and modeling are selected as subjects for programming using Python. The process of building a net" is attached to Chapter 5 appendix "Diode/MOSFET Coding Flow Diagram". Text Python source code suitable for learning by students and companies / corporations can be downloaded from the web.

About the Authors

Akira Matsuzawa: Professor Emeritus, Tokyo Institute of Technology President of Tech Idea Co., Ltd. 1978; Completed master's course at Graduate School of Engineering, Tohoku University. Joined Matsushita Electric Industrial (now Panasonic) in the same year 1997; Completed doctoral program at Graduate School of Engineering, Tohoku University 2003; Professor, Graduate School of Science and Engineering, Tokyo Institute of Technology 2018 Retired from Tokyo Institute of Technology Professor Emeritus at the same university

His books:
"First analog electronic circuit basic circuit edition" Kodansha (2015)
"First Analog Electronic Circuit Practical Circuit Edition" Kodansha (2016)
"Analog RFCMOS Integrated Circuits Basic Edition" Baifukan (2010)
"Analog RFCMOS Integrated Circuits Application Edition" Baifukan (2011)
"Learning Circuit Simulation and Modeling with MATLAB" Torikagesha (2020)

Kenji Mori: Part-time Lecturer, Tokyo Institute of Technology March 1979. Graduated from Tokushima University Graduate School of Electrical Engineering, joined NEC Corporation in the same year, engaged in circuit simulator development, automatic filter design program development, and circuit check program development. Joined Nippon Steel Corporation in November 1990, engaged in parameter extraction of MOSFET models. April 2009 Developed a prototype program for automatic design of mixed-signal LSI with Mr. Sugawara, an industry-academia-government collaboration researcher at Tokyo Institute of Technology. April 2014 Part-time Lecturer, Tokyo Institute of Technology

His books:
"Circuit Simulation Technology and MOSFET Modeling" Realize Riko Center (2003)
"Learning Circuit Simulation and Modeling with MATLAB" Torikagesha (2020)

opportunity for you to submit your #opensource #IC project

Here is another opportunity for you to submit your #opensource #IC project. The MPW-8 shuttle deadline is Dec.31. This project is funded by @Google. https://t.co/UdHt627IYx #semi https://t.co/1hbKtptZlh
— Wladek Grabinski (@wladek60) Dec 8, 2022

from Twitter https://twitter.com/wladek60

December 08, 2022 at 09:55AM
via IFTTT

Dec 7, 2022

[mos-ak] [webinar in 1hour] Special Joint AWG / MOS-AK Webinar

Hello!

our Special Joint AWG / MOS-AK Webinar begins in 1hour

Dec 7, 2022 12:00 (noon) Eastern Time (US and Canada)

Topic: AWG/MOS-AK Panel Discussion
Please click the link below to join the webinar:
https://zoom.us/j/93058965332

-- see you soon -- wladek;

---------- Forwarded message ---------
From: Wladek Grabinski <wladek@grabinski.ch>
Date: Mon, Dec 5, 2022 at 4:55 PM
Subject: Special Joint AWG / MOS-AK Webinar
To: <mos-ak@googlegroups.com>

Arbeitskreis Modellierung von Systemen und Parameterextraktion

Modeling of Systems and Parameter Extraction Working Group

Joint AWG MOS-AK Workshop

December 7, 2022

Please join us for a special joint panel webinar session for the CHIPS Alliance Analog Workgroup and MOS-AK Foundation.

This panel will feature speakers with 20 minute talks on the following topic areas:

@Mehdi Saligane : Introduction to the open source EDA tool flow for IC design (with reference to [1])
@Makris Nikolaos : EKV3 in NGSPICE using ADMSXL
@Keiter, Eric R : Xyce and its support for commercial (hSpice/spectre) libs/syntax
@Tim Edwards : his work on the SkyWater 130 nm compatibility with ngspice
@Kevin Cameron : update on the P1800 (SystemVerilog) AMS standardization efforts (public doc [2])

There will be time for Q & A after each talk and conversation after the presentation completion.

This webinar can be accessed via the following Zoom link, and will be recorded:

Dec 7, 2022 12:00 (noon) Eastern Time (US and Canada)

Topic: AWG/MOS-AK Panel Discussion

Please click the link below to join the webinar:

https://zoom.us/j/93058965332

- Thanks - Rob Mains

General Manager

CHIPS Alliance

rmains@linuxfoundation.org

REF:

[1] Zhang, Qirui, Wenbo Duan, Tim Edwards, Tim Ansell, David Blaauw, Dennis Sylvester, and Mehdi Saligane. "An Open-Source and Autonomous Temperature Sensor Generator Verified With 64 Instances in SkyWater 130 nm for Comprehensive Design Space Exploration." IEEE Solid-State Circuits Letters 5 (2022): 174-177.

[2] P1800 proposal is public, working doc: https://drive.google.com/drive/folders/1TN02eIo7QG-uV57oTM7mDqVPJpgYQO_n?usp=sharing

--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To view this discussion on the web visit https://groups.google.com/d/msgid/mos-ak/CALp-Rj_qwLPD4oaSaL6JOYTV4HHDQq9ijAwVfJa-Dtagzpik_w%40mail.gmail.com.

Dec 5, 2022

[mos-ak] Special Joint AWG / MOS-AK Webinar

Arbeitskreis Modellierung von Systemen und Parameterextraktion

Modeling of Systems and Parameter Extraction Working Group

Joint AWG MOS-AK Workshop

December 7, 2022 at 12:00 (noon) ET

Please join us for a special joint panel webinar session for the CHIPS Alliance Analog Workgroup and MOS-AK Foundation.

This panel will feature speakers with 20 minute talks on the following topic areas:

@Mehdi Saligane : Introduction to the open source EDA tool flow for IC design (with reference to [1])
@Makris Nikolaos : EKV3 in NGSPICE using ADMSXL
@Keiter, Eric R : Xyce and its support for commercial (hSpice/spectre) libs/syntax
@Tim Edwards : his work on the SkyWater 130 nm compatibility with ngspice
@Kevin Cameron : update on the P1800 (SystemVerilog) AMS standardization efforts (public doc [2])

There will be time for Q & A after each talk and conversation after the presentation completion.

This webinar can be accessed via the following Zoom link, and will be recorded:

Dec 7, 2022 12:00 (noon) Eastern Time (US and Canada)

Topic: AWG/MOS-AK Panel Discussion

Please click the link below to join the webinar:

https://zoom.us/j/93058965332

- Thanks - Rob Mains

General Manager

CHIPS Alliance

rmains@linuxfoundation.org

REF:

[2] P1800 proposal is public, working doc: https://drive.google.com/drive/folders/1TN02eIo7QG-uV57oTM7mDqVPJpgYQO_n?usp=sharing

--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
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To view this discussion on the web visit https://groups.google.com/d/msgid/mos-ak/CALp-Rj-yWfnY87VbaSbg5tjqOtef5pZENYW9FiQwk%3D_7LtMrAw%40mail.gmail.com.

Ken Shirriff Spots a Hardware Bug Fix in a #Vintage Intel #8086 Processor #Die https://t.co/yf9275Y1Pa https://t.co/HDo5BBdRhT #semi https://t.co/zSK2o4Ee0W

Ken Shirriff Spots a Hardware Bug Fix in a #Vintage Intel #8086 Processor #Die https://t.co/yf9275Y1Pa https://t.co/HDo5BBdRhT #semi https://t.co/zSK2o4Ee0W
— Wladek Grabinski (@wladek60) Dec 5, 2022

from Twitter https://twitter.com/wladek60

December 05, 2022 at 03:49PM
via IFTTT

[Invitation] Virtual Mini Colloquia (MQ) on "World Transistor Week” as part of the commemoration of "75th Anniversary of Transistor Invention"

Respected All

The year 1905 is well known as the "Miracle Year" because Albert Einstein published four papers that changed the laws of physics and significantly contributed to the foundation of modern physics. Similarly, November 1947 – January 1948 were the three magical months that paved the way for modern-day electronics. This was done by three brilliant scientists who were members of the Mervin Kelly's Solid State Physics Group and Semiconductor Sub-Group at Bell Labs, which were given the challenging task of creating a solid-state semiconductor switch that could replace the vacuum tube. The famous physicists - Walter Brattain and John Bardeen managed to make the first working transistor, now known as the point-contact transistor. The invention was made on December 16, 1947. A week after that, the device was officially demonstrated to Bell Labs executives as a "magnificent Christmas present." In January 1948, William Shockley demonstrated the junction transistor. All three received The Nobel Prize in Physics (1956) and as per Nobel Prize Committee - "In 1947 John Bardeen and Walter Brattain produced a semiconductor amplifier, which was further developed by William Shockley. The component was named a "transistor."

The Electron Devices Society has decided to celebrate the year 2022-2023 as the 75th Anniversary of the Transistor.

I request you to kindly circulate the email amongst IEEE and Non-IEEE members of your institute (especially Undergraduate students).

This will help in increasing the reach of EDS as well as membership of EDS in your chapter/region.

Zoom Link to register and join the MQ: https://us06web.zoom.us/webinar/register/WN_sJ3CS46dS42bqaw1onOhwA

Professor Manoj Saxena
Chair-IEEE EDS Delhi Chapter (India)

Dec 3, 2022

Thomas, S. #Gigahertz #heterojunction bipolar transistors #BJT on #CMOS. Nat Electron (2022) DOI: 10.1038/s41928-022-00902-y https://t.co/NSLdvZjPn9 #semi https://t.co/TD0zsZO056

Thomas, S. #Gigahertz #heterojunction bipolar transistors #BJT on #CMOS. Nat Electron (2022) DOI: 10.1038/s41928-022-00902-y https://t.co/NSLdvZjPn9 #semi https://t.co/TD0zsZO056
— Wladek Grabinski (@wladek60) Dec 3, 2022

from Twitter https://twitter.com/wladek60

December 03, 2022 at 08:23PM
via IFTTT

Dec 1, 2022

#Papertronics: Biodegradable R-C-FET #Amplifier Fabbed on #Paper Substrate | #Electronic Design https://t.co/YB4dOGyhxc #semi https://t.co/qhXwIvDNkb

#Papertronics: Biodegradable R-C-FET #Amplifier Fabbed on #Paper Substrate | #Electronic Design https://t.co/YB4dOGyhxc #semi https://t.co/qhXwIvDNkb
— Wladek Grabinski (@wladek60) Dec 1, 2022

from Twitter https://twitter.com/wladek60

December 01, 2022 at 10:44PM
via IFTTT

[https://t.co/Yqp1cZO3kH House] President Biden to visit Taiwanese chip manufacturer #TSMC's #Arizona #semi #plant on Dec. 6 https://t.co/YMXLOYmYTG

[https://t.co/Yqp1cZO3kH House] President Biden to visit Taiwanese chip manufacturer #TSMC's #Arizona #semi #plant on Dec. 6 https://t.co/YMXLOYmYTG
— Wladek Grabinski (@wladek60) Dec 1, 2022

from Twitter https://twitter.com/wladek60

December 01, 2022 at 09:26AM
via IFTTT

Nov 30, 2022

Will #China succeeds in its #semi strategy and, if so, when? https://t.co/gdbKWp0E3Y https://t.co/maXMpGOsYb

Will #China succeeds in its #semi strategy and, if so, when? https://t.co/gdbKWp0E3Y https://t.co/maXMpGOsYb
— Wladek Grabinski (@wladek60) Nov 30, 2022

from Twitter https://twitter.com/wladek60

November 30, 2022 at 10:34AM
via IFTTT

Nov 29, 2022

#SMIC unveils #12inch #fab expansion project over next 5-7 years https://t.co/CYDh2O94Je #semi https://t.co/CyK7nbzKAK

#SMIC unveils #12inch #fab expansion project over next 5-7 years https://t.co/CYDh2O94Je #semi https://t.co/CyK7nbzKAK
— Wladek Grabinski (@wladek60) Nov 29, 2022

from Twitter https://twitter.com/wladek60

November 29, 2022 at 12:25PM
via IFTTT

#x86 giant says it will tweak spending for #Ohio, #Germany #plants based on ‘market needs’ https://t.co/S4KDODdSN9 #semi #wafers https://t.co/tSDzyQ9xI0

#x86 giant says it will tweak spending for #Ohio, #Germany #plants based on ‘market needs’ https://t.co/S4KDODdSN9 #semi #wafers https://t.co/tSDzyQ9xI0
— Wladek Grabinski (@wladek60) Nov 29, 2022

from Twitter https://twitter.com/wladek60

November 29, 2022 at 08:42AM
via IFTTT

Nov 25, 2022

€45 billion European Chips Act

Envoys from the member states of the European Union #EU have agreed to an amended version of the €45 billion European #Chips #Act on Wednesday, according to Reuters.” https://t.co/P9qULkQYGZ #semi https://t.co/dffa8fHLJn
— Wladek Grabinski (@wladek60) Nov 25, 2022

from Twitter https://twitter.com/wladek60

November 25, 2022 at 03:11PM
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[paper] Quasi-Fermi-Based Charge Transport Scheme for Device Simulation in Cryogenic

Quasi-Fermi-Based Charge Transport Scheme for Device Simulation

in Cryogenic, Wide-Band-Gap, and High-Voltage Applications

Zlatan Stanojevic, Senior Member, IEEE, Jose Marıa Gonzalez-Medina, Member, IEEE,

Franz Schanovsky, Member, IEEE, Markus Karner, Member, IEEE

TechRxiv. Preprint (2022)

DOI:10.36227/techrxiv.21132637.v2

Abstract: We present a novel approach to solving the transport problem in semiconductors. We reformulate the drift-diffusion equations in terms of the quasi-Fermi-energies as solution variables; a drastic increase in numerical stability is achieved, which permits the simulation of devices at cryogenic temperatures as well as wide-band-gap devices using double precision arithmetic, instead of extended precision arithmetic which would otherwise be required to solve these applications using regular drift-diffusion.

FIG: MOSFET transfer characteristics from 300K down to 4K simulated using FVM/SG/QFT at VDS=0.8V; despite only relying on double precision arithmetic, FVM/SG/QFT is capable of calculating contact currents down to 1e-310A.

Nov 24, 2022

[Efabless Corporation] GF 180nm shuttle

[Efabless Corporation] Watch Matt Venn's video on how to submit your design for the #GF #180nm shuttle leaving Dec 5th. Enter for a chance to win a wafer! See video for details <https://t.co/uLP0eWOA6l> #GF #icdesign #hardwaredesign #opensourcecommunity #video #semi https://t.co/OkU562mb6D
— Wladek Grabinski (@wladek60) Nov 24, 2022

from Twitter https://twitter.com/wladek60

November 24, 2022 at 11:44AM
via IFTTT

Fwd: Invitación al seminario en línea

La Cátedra Eugenio Méndez Docurro 2022 le invita a participar en la primera sesión del seminario en línea

Mapeo de conectividad para cerrar la Brecha Digital

Segunda Sesión

24 de noviembre de 2022

10:00 h
Hora Ciudad de México

Moderador

Arturo Serrano Santoyo
Universidad Autónoma de Baja California

Programa

10:00 h

10:20 h

10:40 h

11:00 h

Para acceder a la sala en Zoom haz tu registro en el siguiente botón

Registro en Zoom