Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Jose Lugo, Joao Azevedo, Sebastien Sadlo, Quentin Berlingard, Mikael Casse, Philippe Galy
Using DC transistor characterization measurements for LNA design at cryogenic temperatures
(2026) researchsquare.com
DOI: 10.21203/rs.3.rs-7754596/v1
1. STMicroelectronics, Crolles (F)
2. Univ. Grenoble Alpes, CNRS, Grenoble-INP, TIMA, Grenoble (F)
3. Univ. Grenoble Alpes, CEA-Leti, Grenoble (F)
4. Univ. Grenoble Alpes, CNRS, Grenoble-INP, IMEP-LAHC, Grenoble (F)
Abstract: The design of Radio Frequency (RF) cryogenic circuits has attracted much interest in recent years due to applications such as quantum computers. Interface electronics with ultra-low levels of power consumption at temperatures as low as 4 K are required. Silicon technologies are being considered for implementation because of the possibility of large-scale qubit integration with energy-efficient readout and control interfaces. However, the design of RF cryogenic circuits is complicated because of the lack of standard design kits with the corresponding component models for their simulation at these temperatures. Alternative approaches to avoid costly design and fabrication cycles are possible, in particular the use of Look-Up-Table (LUT) based techniques that exploit characterization data of circuit components at cryogenic temperature. In this paper, we make use of this approach for the design of a RF Low Noise Amplifier (LNA) using a 28 nm FD-SOI technology that has been characterized at cryogenic temperatures1using DC measurements. Furthermore, we also experimentally demonstrate that the DC measurements used are valid to extract the transistor noise parameters used in the LUT-based analysis.
Fig: Measurement of: (a) transconductance gm, and (b) threshold voltage Vth
for the 28nm FD-SOI technology, from 300K down to 4K.
Acknowledgements: This work was supported by the French CIFRE program and the Labex MINOS of French program ANR-10-LABX-55-01.
