[paper] Multi-Agent Self-Evolved ABC

Cunxi Yu and Haoxing Ren

Autonomous Evolution of EDA Tools: Multi-Agent Self-Evolved ABC

In 63rd ACM/IEEE Design Automation Conference (DAC ’26)

July 26–29, 2026, Long Beach, CA

DOI: 10.1145/3770743.3804221

Abstract: This paper introduces the first self-evolving logic synthesis framework, which leverages Large Language Model (LLM) agents to autonomously improve the source code of ABC, the widely adopted logic synthesis system. Our framework operates on the entire integrated ABC codebase, and the output repository preserves its single-binary execution model and command interface. In the initial evolution cycle, we bootstrap the system using existing prior open-source synthesis components, covering flow tuning, logic minimization, and technology mapping, but without manually injecting new heuristics. On top of this foundation, a team of LLM-based agents iteratively rewrites and evolves specific sub-components of ABC following our “programming guidance“ prompts under a unified correctness and QoR-driven evaluation loop. Each evolution cycle proposes code modifications, compiles the integrated binary, validates correctness, and evaluates quality-of-results (QoR) on multi-suite benchmarks including ISCAS 85/89/99, VTR, EPFL, and IWLS 2005. Through continuous feedback, the system discovers optimizations beyond human-designed heuristics, effectively learning new synthesis strategies that enhance QoR. We detail the architecture of this self-improving system, its integration with ABC, and results demonstrating that the framework can autonomously and progressively improve EDA tool at full million-line scale.

Fig: Overview of the multi-agent self-evolving framework for ABC. Specialized LLM agents evolve distinct subsystems (flow optimization, core algorithms, and mapping), with each iteration undergoing compilation, formal CEC verification, and full QoR evaluation. A planning agent coordinates global decisions, a coding agent implements edits, and all agents follow a shared rulebase and unified evaluation pipeline to enable coordinated, correctness-preserving improvements.

Acknowledgment: The authors would like to thank Prof. Zhiru Zhang and his students for their valuable feedback and insightful discussions.

[paper] State Transitions in Autonomous Nonlinear Bistable Systems

Léopold Van Brandt and Jean-Charles Delvenne

Predicting State Transitions in Autonomous Nonlinear Bistable Systems

with Hidden Stochasticity

IEEE Control Systems Letters (L-CSS 2024)

* UCLouvain, Louvain-la-Neuve (B)

Abstract: Bistable autonomous systems can be found in many areas of science. When the intrinsic noise intensity is large, these systems exhibits stochastic transitions from one metastable steady state to another. In electronic bistable memories, these transitions are failures, usually simulated in a Monte-Carlo fashion at a high CPU-time price. Existing closed form formulas, relying on near-stable-steady-state approximations of the nonlinear system dynamics to estimate the mean transition time, have turned out inaccurate. Our contribution is twofold. From a unidimensional stochastic model of overdamped autonomous systems, we propose an extended Eyring-Kramers analytical formula accounting for both nonlinear drift and state-dependent white noise variance, rigorously derived from Itô stochastic calculus. We also adapt it to practical system engineering situations where the intrinsic noise sources are hidden and can only be inferred from the fluctuations of observables measured in steady states. First numerical trials on an industrial electronic case study suggest that our approximate prediction formula achieve remarkable accuracy, outperforming previous non-Monte-Carlo approaches.

Fig: (a) SRAM bitcell retaining a logical 0 or 1 encoded on two complementary node voltages (v2 and v1) as low and high levels VL and VH. The retained state is stabilised by a feedback loop implemented by two cross-coupled inverters. An inverter is a nonlinear time-invariant system producing a high VH (resp. low VL) output when its input is maintained at constant low VL (resp. high VH), yet with internal dynamics and intrinsic noise.

(b) Transient noise simulation at supply voltage VDD = 70 mV (adapted from [1]). Intrinsic noise-induced stochastic state transitions (bit flips VL ↔ VH) are observed. VM denotes the threshold voltage corresponding to the unstable state. For the illustrated case, the bistable system is symmetrical in the sense that two inverters are identical, making the two steady states equiprobable and the transitions VL ↔ VH rates equal.

Acknowledgements: The work has been partially supported by the Research Project "Thermodynamics of Circuits for Computation" of the National Fund for Scientific

Research (FNRS) of Belgium.