2020 IEEE #IEDM To Highlight Innovative Devices for a #Better #Future

2020 IEEE #IEDM To Highlight Innovative Devices for a #Better #future https://t.co/8m1toPqhfI #paper pic.twitter.com/3FlTSlo3Id

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[paper] Analogue 2D Semiconductor Electronics

Analogue two-dimensional semiconductor electronics

Dmitry K. Polyushkin¹, Stefan Wachter¹, Lukas Mennel¹, Matthias Paur¹, Maksym Paliy², Giuseppe Iannaccone², Gianluca Fiori², Daniel Neumaier^3,4, Barbara Canto^3,4

and Thomas Mueller¹ 

Nat Electron 3, 486–491 (2020)

DOI: 10.1038/s41928-020-0460-6

¹Vienna University of Technology, Institute of Photonics, Vienna, Austria. 
²Dipartimento di Ingegneria dell’Informazione, Università di Pisa, Pisa, Italy.
³AMO GmbH, Aachen, Germany. 

⁴Bergische Universität Wuppertal, Wuppertal, Germany

Abstract: Digital electronics are ubiquitous in the modern world, but analogue electronics also play a crucial role in many devices and applications. Analogue circuits are typically manufactured using silicon as the active material. However, the desire for improved performance, new devices and flexible integration has—as for their digital counterparts—led to research into alternative materials, including the use of two-dimensional (2D) materials. Here, we show that operational amplifiers—a basic building block of analogue electronics—can be created using the 2D semiconductor molybdenum disulfide (MoS2) as the active material. The device is capable of stable operation with good performance, and we demonstrate its use in feedback circuits including inverting amplifiers, integrators, log amplifiers and transimpedance amplifiers. We also show that our 2D platform can be used to monolithically integrate an analogue signal preconditioning circuit with a MoS2 photodetector.

Fig: a) Schematic of the back-gated transistor architecture; 

b) Transfer characteristics of a typical transistor on the chip (W/L = 4); 

c) View of a single OPA showing the pinout and transistor labelling

Circuit design and modelling: Because a complete model of back-gated 2D semiconductor FETs is still not readily available, we fitted the experimental results with an Enz–Krummenacher– Vittoz (EKV) model in both, the subthreshold and inversion, regimes. All the transistors operate in the inversion regime, we used the inversion model to simulate the OPA, obtaining a nominal low-frequency Atot gain value.

Acknowledgements: We thank A.J. Molina-Mendoza for technical assistance and N. Schaefer and J.A. Garrido for providing a polyimide substrate. We acknowledge financial support by the European Union (grant agreements 785219 Graphene Flagship, 796388 ECOMAT and 828901 ORIGENAL), the Austrian Science Fund FWF (START Y 539-N16) and the Italian MIUR (FIVE 2D).

Electronic Frontier Foundation Turns 30 This Year! Learn More About #EFF, and How You Can Help. https://t.co/jDPakWReaO #OpenSource https://t.co/7bDPyRYenl

Electronic Frontier Foundation Turns 30 This Year! Learn More About #EFF, and How You Can Help. https://t.co/jDPakWReaO #OpenSource pic.twitter.com/7bDPyRYenl

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#India now ranks among the #Top10 countries in terms of the number of #opensource projects [https://t.co/5VnCn8CErA] https://t.co/v2IsUB9ZZL https://t.co/ScATobwByx

#India now ranks among the #Top10 countries in terms of the number of #opensource projects [https://t.co/5VnCn8CErA] https://t.co/v2IsUB9ZZL pic.twitter.com/ScATobwByx

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[paper] RF Small-Signal Model for Four-Port Network MOSFETs

A High-Frequency Small-Signal Model for Four-Port Network MOSFETs

Alejandro Roman-Loera¹, Member, IEEE, Anurag Veerabathini², Member, IEEE, Luis A.Flores-Oropeza¹, Member, IEEE, and Jaime Ramirez-Angulo³, Life Fellow, IEEE

IEEE 63rd IMWSCAS 2020

DOI:10.1109/mwscas48704.2020.9184475 

¹Electronic Systems Department, Universidad Autonoma de Aguascalientes, Mexico.
²Maxim Integrated, Chandler, AZ, USA.
³Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USA.

Abstract: A high-frequency small-signal model for a MOSFET is proposed considering the parasitic capacitances associated with each terminal that is critical in the design of high-frequency amplifiers. The proposed model allows in obtaining a closed form expression for poles and zeros due to parasitic elements along with the conventional poles and zeros. This model gives an additional degree of freedom in choosing the location of poles and zeros to improve the frequency response. The proposed high-frequency small-signal model for MOSFET is validated in simulation by implementing a high-frequency voltage follower in 0.18µm CMOS process. The proposed model shows the existence of a zero in a voltage follower that is introduced by the parasitic elements at high-frequencies and it is validated with implementation.

Fig: Small signal equivalent circuit of a 4-port MOSFET (a) Conventional model, (b) Model with substrate parasitics, and (c) Model with additional parasitics, and (d) Proposed model.

Acknowledgment: This work has been supported by PRODEP program from SEP (Secretariat of Public Education, Mexico) and Universidad Autonoma de Aguascalientes, Aguascalientes, Mexico.