[paper] Heterojunction Nano-HEMT

G. Purna Chandra Rao1, Trupti Ranjan Lenka2, Valeria Vadalà3

and Hieu Pham Trung Nguyen4

Characteristics Study of Heterojunction III-Nitride/β-Ga2O3 Nano-HEMT for THz Applications

Eng. Res. Express (2024) in press
DOI: 10.1088/2631-8695/ad3db1

1 Electronics and Communication Engineering, NIT Silchar, Assam (IN)

2 Electronics and Communication Engineering, NIT Silchar, Assam (IN)

3 Physics, University of Milan-Bicocca (IT)

4 Electrical and Computer Engineering, Texas Tech University (USA)

Abstract: In this research study, a recessed gate III-Nitride high electron mobility transistor (HEMT) grown on a lattice matched β-Ga2O3 substrate is designed. This research investigation aims to enhance DC and RF performance of AlGaN/GaN HEMT, and minimize the short-channel effects by incorporating an AlGaN back layer and field plate technique, which can enhances electron confinement in two-dimensional electron gas (2DEG). A precise comparison analysis is done on the proposed HEMT’s input characteristics, output characteristics, leakage current characteristics, breakdown voltage properties, and RF behaviour in presence and absence of AlGaN back layer in regard to field plate configuration. The inclusion of back barrier aids in raising the level of conduction band, which reduces leakage loss beneath the buffer, and aids in keeping the 2DEG to be confined to a narrow channel. Furthermore, the field plate design offers an essential electric field drift between gate and drain, resulting to enhanced breakdown voltage characteristics.

FIG : Epitaxial schematic illustration of suggested III-nitride HEMT with the proposed back barrier and field plates.

Acknowledgment : The authors acknowledge SERB (Science and Engineering Research Board), Govt. of India sponsored Mathematical Research Impact Centric Support (MATRICS) project no. MTR/2021/000370 for support.

[paper] GaN HEMTs: Past, development, and future

Haorui Luo^ab, Wenrui Hua^a, Yongxin Guo^ab,

On large-signal modeling of GaN HEMTs: Past, development, and future

Chip, 2023, 100052

DOI: 10.1016/j.chip.2023.100052.

^a Department of Electrical and Computer Engineering, National University of Singapore

^b National University of Singapore (Suzhou) Research Institute, China

Abstract : In the past few decades, circuits based on gallium nitride high electron mobility transistor (GaN HEMT) have demonstrated exceptional potential in a wide range of high-power and high-frequency applications, such as the new generation mobile communications, object detection, consumer electronics, etc. As a critical intermediary between GaN HEMT devices and circuit-level applications, GaN HEMT large-signal models play a pivotal role in the design, application and development of GaN HEMT devices and circuits. This review provides an in-depth examination of the advancements in GaN HEMT large-signal modeling in recent decades. Detailed and comprehensive coverage of various aspects of GaN HEMT large-signal model are offered, including large-signal measurement setups, classical formulation methods, model classification, non-ideal effects, etc. In order to better serve follow-up research, this review also explores potential future directions for the development of GaN HEMT large-signal modeling.

FIG : Timeline of some typical GaN HEMT large-signal models.

Funding : This work was supported in part by the National Research Foundation (NRF) of Singapore under Grant NRF-CRP17-2017-08.

Postdoc position in GaN power devices

The POWERlab (https://powerlab.epfl.ch) at EPFL is looking for excellent and motivated candidates to work on new concepts for power electronic devices based on GaN heterostructures. The candidate will pursue novel ideas related to concepts developed in our laboratory, for example [1]. The candidate will have the opportunity to work on several aspects involved in demonstrating high-performance power devices (cleanroom fabrication, device simulation and characterization) relying on the excellent facilities in our laboratory and at EPFL. Most importantly, the candidate is encouraged to try new ideas and approaches.

Profile: The candidate is expected to have a solid theoretical background in semiconductors and experience in cleanroom fabrication of GaN electronic devices, with strong aptitude to perform experiments, explore new concepts, and communicate his/her findings in high-quality scientific publications.

What is offered: The selected candidate will be offered a fellowship with very competitive salary and excellent conditions to excel in his/her research.

How to apply: If you are interested, and have the correct profile for this position, please send your CV to elison.matioli@epfl.ch, including publication list and names of two references.

REF:

[1] L. Nela, J. Ma, C. Erine, P. Xiang, T.-H. Shen, V. Tileli, T. Wang, K. Cheng and E. Matioli, “Multi-channel nanowire devices for efficient power conversion” Nature Electronics, 4, 284–290, (2021)

[paper] Effect of doping on Al2O3/GaN MOS capacitance

B.Rrustemi^ab, C.Piotrowicz^a, M-A.Jaud^a, F.Triozon^a, W.Vandendaele^a, B.Mohamad^a, R.Gwoziecki^a, G.Ghibaudo^b

Effect of doping on Al2O3/GaN MOS capacitance

Solid-State Electronics

Vol. 194, Aug. 2022, 108356

DOI: 10.1016/j.sse.2022.108356

   
a CEA, LETI, Grenoble (Fermi)
b IMEP-LAHC Minatec, Grenoble(FR)

Abstract: This paper investigates the turning-on-voltage (VFB/VTH) of Al2O3/GaN MOS stacks with n-doped GaN, p-doped GaN and not intentionally doped (NID) GaN by exploiting capacitance measurements on large gate area test structures with systematic variation of Al2O3 thickness (tox). Measurements are compared with 1D Schrödinger-Poisson simulations including incomplete ionization model. The necessity of using a quantum description of electron density is demonstrated especially for thinner gate oxides. We found that, contrary to what is expected, p-doping below the channel barely increases the VTH and the VTH is independent of tox, even if the density of activated acceptors is demonstrated to be sufficiently high. Our results highly suggest that the negative charge induced by p-doping is compensated at the oxide level.

Fig: Al2O3/GaN MOS stacks with n-doped GaN, p-doped GaN and its CV plots

[webinar] Power WBG Semiconductor Technology Opportunities

"Power WBG Semiconductor Technology Opportunities"

webinar hosted by 

Dr. Victor Veliadis, 

Executive Director and CTO of PowerAmerica, 

a WBG semiconductor power electronics consortium

Event by Łukasiewicz - Institute of Microelectronics and Photonics

Register now: https://lukasiewiczimif.clickmeeting.com/poweramerica/register

Silicon power devices have dominated power electronics due to their excellent starting material quality, ease of fabrication, low-cost volume production, and proven reliability. However, they’re approaching their operational limits primarily due to their relatively low bandgap and critical electric field that results in high conduction and switching losses, and poor high-temperature performance. So what can we do? Well, let’s talk about the favorable WBG material properties, their volume application opportunities, and last but not least let's highlight the respective competitive advantages of SiC and GaN.

You will additionally learn about:

• the lateral and vertical power device configurations that will be analyzed in the context of bidirectional switching
• specific applications and needs for bidirectional switches
• key topologies, enabled by bidirectional switches
• PowerAmerica’s work to accelerate WBG power electronics commercialization

About Dr. Veliadis: Dr. Victor Veliadis is Executive Director and CTO of PowerAmerica, a WBG semiconductor power electronics consortium. At PowerAmerica, he has managed a budget of $146 million that he strategically allocated to 200 industrial and University projects to accelerate WBG semiconductor clean energy manufacturing, workforce development, and job creation. His PowerAmerica educational activities have trained 410 University FTE students in applied WBG projects, and engaged 4100 attendees in tutorials, short courses, and webinars. Dr. Veliadis is an ECE Professor at NCSU and an IEEE Fellow and EDS Distinguished Lecturer. He has 27 issued U.S. patents, 6 book chapters, and over 125 peer-reviewed publications. Prior to entering academia and taking an executive position at Power America in 2016, Dr. Veliadis spent 21 years in the semiconductor industry where his work included design, fabrication, and testing of SiC devices, GaN devices for military radar amplifiers, and financial and operations management of a commercial semiconductor fab. He has a Ph.D. degree in Electrical Engineering from John Hopkins University (1995).

[paper] Review of AlGaN/GaN HEMTs Based Devices

Ahmed M. Nahhas

Review of AlGaN/GaN HEMTs Based Devices

American Journal of Nanomaterials. 2019, 7(1), 10-21

DOI: 10.12691/ajn-7-1-2

  

Department of Electrical Engineering, Umm Al Qura University, Makkah (SA)

Abstract: This paper presents a review of the recent advances of the AlGaN/GaN high-electron-mobility transistors (HEMTs) based devices. The AlGaN/GaN HEMTs have attracted potential for high frequency, voltage, power, temperature, and low noise applications. This is due to the superior electrical, electronic properties, high electron velocity of the GaN. These properties include the GaN wideband gap energy, electrical, optical and structural properties. The based structures of GaN such as AlGaN/GaN are driving the interest in the research areas of GaN HEMTs. Recently, the AlGaN/GaN HEMTs have gained a great potential in radio frequency (RF) and power electronics (PE) based devices and applications. The recent aspects of the AlGaN/GaN HEMTs devices are presented and discussed. The performance of different device demonstrated based on AlGaN/GaN HEMTs are reviewed. The structural, electrical, and optical properties of these devices are also reviewed.

Fig: Schematic of AlGaN/GaN HEMTs

[paper] Transistor Modelling for mm-Wave Technology Pathfinding

B.Parvais1, R. ElKashlan1, H. Yu, A. Sibaja-Hernandez, B. Vermeersch, V. Putcha, P. Cardinael2, R. Rodriguez, A. Khaled, A. Alian, U. Peralagu, M. Zhao, S.Yadav, G. Gramegna, J. Van Driessche, N. Collaert

Transistor Modelling for mm-Wave Technology Pathfinding

SISPAD, 2021 

DOI: 10.1109/SISPAD54002.2021.959253

   
* imec, Kapeldreef 75, 3001 Leuven, Belgium
1 also with Vrije Universiteit Brussels, 1050 Brussels, Belgium
2 also with UCLouvain, Louvain-la-Neuve, Belgium

Abstract: A review of the modelling requirements to establish a Design-Technology Co-Optimization loop for mmWave Front-End Modules is presented. The example of GaN/Si technology is detailed, and recent modeling developments are explained.

Fig: The RF-DTCO loop concept: from device modeling

and exploration to benchmark circuits.

[paper] Pseudo-morphic PHEMT: Numerical Simulation Study

Khaouani Mohammed, Hamdoune Abdelkader, Guen Ahlam Bouazza, Kourdi Zakarya, Hichem Bencherif

An Improved Performance of Al0.25Ga0.75N/AlN/GaN/Al0.25Ga0.75N Pseudo-morphic High Electron Mobility Transistor (PHEMT): 

Numerical Simulation Study

IC-AIRES 2021. Lecture Notes in Networks and Systems, vol 361. Springer

DOI: 10.1007/978-3-030-92038-8_80

1. Hassiba Benbouali, Chlef, Algeria

2. University of Abou-Bakr Belkaid, Tlemcen, Algeria
3. Center Exploitation Satellite Communications Agency of Space Oran, Algeria
4. University of Mostefa Benboulaid, Batna, Algeria 

Abstract: In this paper a 9nm T-shaped gate length, Pseudo-morphic High Electron Mobility Transistor (pHEMT AlGaN/AlN/GaN/AlGaN) is studied; we use TCAD software. DC, AC and RF performances assessment allow to exhibit interesting results such as a maximum drain current IDSmax=35mA at VGS=0V, a knee voltage Vknee=0.5V with ON-resistance Ron=0.8Ω-mm, a sub-threshold swing of 75mV/decade, a maximum transconductance value gm=160mS/mm, a DIBL of 36mV/V, a drain lag of 8.5%, a cut-off frequency of 110GHz, a maximum oscillation frequency of 800GHz, and very suitable breakdown voltage VBR of 53.1V. This device can be used in radar, high power and amplifier applications.

[book] Advanced ASM-HEMT Model for GaN HEMTs

Sourabh Khandelwal

Advanced SPICE Model for GaN HEMTs (ASM-HEMT)

A New Industry-Standard Compact Model 

for GaN-based Power and RF Circuit Design

DOI: 10.1007/978-3-030-77730-2

eBook ISBN: 978-3-030-77730-2

Describes in detail a new industry standard for GaN-based power and RF circuit design. Includes discussion of practical problems and their solutions in GaN device modeling. Covers both radio-frequency (RF) and power electronics application of GaN technology and describes SPICE modeling of both GaN RF and power devices.

Table of contents:

• Front Matter; pp. i-xv
• Gallium Nitride Semiconductor Devices; pp. 1-8
• Compact Modeling; pp. 9-19
• Introduction to ASM-HEMT Compact Model; pp. 21-31
• Core Formulations in ASM-HEMT Model; pp. 33-45
• Non-ideal Effects in Device Current and Their Modeling; pp. 47-62
• Trapping Models; pp. 63-81
• Non-Ideal Effects in GaN Capacitances and Their Modeling; pp. 83-100
• Gate Current Model; pp. 101-113
• Effect of Ambient Temperature on GaN Device; pp. 115-124
• Noise Models; pp. 125-130
• Parameter Extraction in ASM-HEMT Model; pp. 131-150
• Advance Simulations with ASM-HEMT Model; pp. 153-174
• Resources for ASM-HEMT Model Users; pp. 175-175
• Back Matter; pp. 175-188

About the author:

Sourabh Khandelwal is Senior Lecturer at the School of Engineering at Macquarie University, Sydney. He is the lead developer of ASM--HEMT compact model, which is a new industry standard compact model for GaN RF and power devices. Earlier to this role, Manager of Berkeley Device Modeling Center and Postdoctoral Researcher at the BSIM group at University of California, Berkeley. Before that, he worked as Research Engineer at IBM Semiconductor Research. He has over 200 publications in top-tier conferences and journals in the area of semiconductor device modeling and circuit design.

[papers] Compact Modeling

[1] Nicolo Zagni; Simulation and Modeling Methods for Predicting Performance and Reliability Limits of 21st-Century Electronics; PhD Thesis, Universita Degli Estudi Di Modena e Reggio Emilia; Anno Accademico 2019–2020 (CICLO XXXIII)

Abstract: In recent years, a plethora of novel semiconductor devices have started emerging as worthy heirs of Silicon-based transistors – giving rise to the ’post-Moore’ era. Traditional electronics is mostly based on Si devices, – from logic to memory, to high frequency/power and sensing applications – but this paradigm is changing thanks to the developments in different fields ranging from physics and semiconductor materials, to processing techniques and computing architectures. In this hectic new scenario, before even considering a new technology as a replacement of the existing ones, the limiting factors to its performance and reliability need to be well-understood and engineered for. In this sense, simulations and physics-based modeling represent critical tools to make sure that newly conceived technologies stand up to the requirements of 21st century electronics. In this thesis, state-of-the-art simulation and compact modeling tools are exploited to analyze the performance and reliability limits of several emerging technologies. Specifically, this dissertation is focused on four application scenarios and the relative candidate technologies that aim to providing enhanced performance/reliability compared to Si-based counterparts. These are: i) III-V MOSFETs for logic/digital circuits, ii) resistive-RAMs and ferroelectric-FETs for non-volatile memory and in-memory computing, iii) GaN-based high-speed transistors for power applications, and iv) negative capacitance transistors for biosensing.

Fig: Energy bandgap (Eg) vs lattice constant (a) of different semiconductor materials, showing that In0.57Ga0.43As has the same lattice constant as InP. Adapted from: https://www.iue.tuwien.ac.at/phd/brech/diss.htm (visited on 12/20/2020).

---

[2] G. Maroli, A. Fontana, S. M. Pazos, F. Palumbo and P. Julián, "A Geometric Modeling Approach for Flexible, Printed Square Planar Inductors under Stretch," 2021 Argentine Conference on Electronics (CAE), Bahia Blanca, Argentina, 2021, pp. 61-66, DOI: 10.1109/CAE51562.2021.9397568.

Abstract: In this work a compact model for square planar inductors printed on flexible substrate is proposed. The approach considers the deformation of the metal traces of square spiral inductors when the substrate is subjected to physical stretch. The model considers a typical pi-network for the device, where each component is calculated for different stretching values adapting widely accepted models on the literature for the total inductance, the AC resistance and the ground coupling and inter-wounding capacitances. Model results are contrasted to 3D full electromagnetic wave simulations under parametric sweeps of the dimensions calculated under stretch. Results show good agreement within a 20 % stretch up to the first resonance frequency of the structure. The model can prove useful for the optimization of component design for printed applications on flexible substrates.

---

[3] H. Kikuchihara et al., "Modeling of SJ-MOSFET for High-Voltage Applications with Inclusion of Carrier Dynamics during Switching," 2021 International Symposium on Devices, Circuits and Systems (ISDCS), Higashihiroshima, Japan, 2021, pp. 1-4, DOI: 10.1109/ISDCS52006.2021.9397904.

Abstract: Demands for higher-voltage MOSFET application are increasing, for which a Super-Junction MOSFET, sustaining the voltages in the range of 500V, has been developed based on the trench-type structure. Due to the huge bias applied, a new leakage-current type is induced during switching, which causes a switching-power-loss increase. Creating a compact model for circuit design, which includes this additional leakage current, is the purpose of the present development. The model describes the depletion-width variation, caused during the switching-on of the device, with the use of the internal node potential, determined accurately by iteration. It is verified, that the new compact model can accurately predict the device performances for different device structures. This capability can be used for device optimization to realize low-power circuitry.

[Photos] MOS-AK LADEC Mexico April 18, 2021

Arbeitskreis Modellierung von Systemen und Parameterextraktion

Modeling of Systems and Parameter Extraction Working Group

MOS-AK LAEDC Workshop

(virtual/online) April 18, 2021

Together with local Host and LAEDC Organizers as well as all the Extended MOS-AK TPC Committee, we have organized the 3rd subsequent MOS-AK/LAEDC workshop which was the Virtual/Online event. There are a couple of the event photos:

MOS-AK Session 1 (APR.18) begun: 8:00am Mexico time zone (GMT-5)

T_1 FOSSEE eSIM: An open source CAD software for circuit simulation

Kannan Moudgalya

IIT Bombay (IN)

T_2 Memristor modeling

Arturo Sarmiento

INAOE (MX)

T_3 Modeling Issues for CMOS RF ICs

Roberto Murphy, Jose Valdes and Reydezel Torres

INAOE (MX)

T_4 Improving Time-Dependent Gate Breakdown of GaN HEMTs with p-type Gate

E. Sangiorgi, A. Tallarico, N. Posthuma, S. Decoutere, C. Fiegna

Universita di Bologna

MOS-AK Session 2 (APR.18) begun: 1:00pm Mexico time zone (GMT-5)

T_5 Compact Models of SiC and GaN Power Devices

Alan Mantooth, Arman Ur Rashid, Md Maksudul Hossain

University of Arkansas (US)

T_6 New analytical model for AOSTFTs

Antonio Cerdeira

CINVESTAV-IPN, Mexico City (MX)

T_7 On the Parameter Extraction of Thin-Film Transistors in Weak-Conduction

Adelmo Ortiz-Conde

Solid State Electronics Laboratory, Simon Bolivar University, Caracas (VE)

End of MOS-AK Workshop
Group Photo

[paper] 3D integrated GaN/RF-SOI SPST switch

Frédéric Drillet, Jérôme Loraine, Hassan Saleh, Imene Lahbib, Brice Grandchamp, Lucas Iogna-Prat, Insaf Lahbib, Ousmane Sow, Albert Kumar and Gregory U'Ren 

RF Small and large signal characterization of a 3D integrated GaN/RF-SOI SPST switch 

International Journal of Microwave and Wireless Technologies, pp. 1–6, 2021.

*X-FAB France, Corbeil-Essonnes (F)

Abstract: This paper presents the radio frequency (RF) measurements of an SPST switch realized in gallium nitride (GaN)/RF-SOI technology compared to its GaN/silicon (Si) equivalent. The samples are built with an innovative 3D heterogeneous integration technique. The RF switch transistors are GaN-based and the substrate is RF-SOI. The insertion loss obtained is below 0.4 dB up to 30 GHz while being 1 dB lower than its GaN/Si equivalent. This difference comes from the vertical capacitive coupling reduction of the transistor to the substrate. This reduction is estimated to 59% based on a RC network model fitted to S-parameters measurements. In large signal, the linearity study of the substrate through coplanar waveguide transmission line characterization shows the reduction of the average power level of H2 and H3 of 30 dB up to 38 dBm of input power. The large signal characterization of the SPST shows no compression up to 38 dBm and the H2 and H3 rejection levels at 38 dBm are respectively, 68 and 75 dBc.

Fig: X-FAB 3D integration proposal cross-section (left) and the picture of a GaN coupon (right).

Acknowledgement: We would like to acknowledge the Nano2022 program for partially funding this work.

Supplementary material: The supplementary material for this article can be found at DOI: 0.101/1759078721000076

[paper] Modeling Power GaN-HEMTs in SPICE

Utkarsh Jadli, Faisal Mohd-Yasin, Hamid Amini Moghadam, Peyush Pande*, Mayank Chaturvedi and Sima Dimitrijev

Modeling Power GaN-HEMTs Using Standard MOSFET Equations and Parameters in SPICE

Electronics 2021, 10, 130

DOI: 10.3390/electronics10020130

Queensland Micro- and Nanotechnology Centre, Griffith University, Brisbane, QLD 4111, Australia;

*Electronics Department, Graphic Era (Deemed to Be University), Dehradun, Uttarakhand 248002, India;

Abstract: The device library in the standard circuit simulator (SPICE) lacks a gallium nitride based high-electron-mobility-transistor (GaN-HEMT) model, required for the design and verification of power-electronic circuits. This paper shows that GaN-HEMTs can be modeled by selected equations from the standard MOSFET LEVEL3 model in SPICE. A method is proposed for the extraction of SPICE parameters in these equations. The selected equations and the proposed parameter-extraction method are verified with measured static and dynamic characteristics of commercial GaN-HEMTs. Furthermore, a double pulse test is performed in LTSpice and compared to its manufacturer model to demonstrate the effectiveness of the MOSFET LEVEL3 model. The advantage of the proposed approach to use the MOSFET LEVEL3 model, in comparison to the alternative behavioral-based model provided by some manufacturers, is that users can apply the proposed method to adjust the parameters of the MOSFET LEVEL3 model for the case of manufacturers who do not provide SPICE models for their HEMTs.

Fig: Internal cross-sectional structure of GaN-HEMT

Acknowledgments: The authors would like to acknowledge the Innovative Manufacturing Co- operative Research Centre (IMCRC) for providing a PhD scholarship to the first author. We also acknowledge the School of Engineering and Built Environments (EBE) of Griffith University for funding this project. This work was performed in part at the Queensland node of the Australian National Fabrication Facility, a company established under the National Collaborative Research Infrastructure Strategy to provide nano- and micro-fabrication facilities for Australia’s researchers.

[paper] The advantages of p-GaN channel/Al2O3 gate insulator

Maria Ruzzarin,1, Carlo De Santi,1 Feng Yu,2 Muhammad Fahlesa Fatahilah,2 Klaas Strempel,2 Hutomo Suryo Wasisto,2 Andreas Waag,2 Gaudenzio Meneghesso,1 Enrico Zanoni,1

and Matteo Meneghini1

Highly stable threshold voltage in GaN nanowire FETs: The advantages of p-GaN channel/Al2O3 gate insulator

Appl. Phys. Lett. 117, 203501 (2020); 

DOI: 10.1063/5.0027922

Published Online: 16 November 2020

1 Department of Information Engineering, University of Padova, via Gradenigo 6/b, 35131 Padova, Italy
2 Institute of Semiconductor Technology (IHT) and Laboratory for Emerging Nanometrology (LENA), Technische Universitat Braunschweig, Langer Kamp 6a/b, 38106 Braunschweig, Germany

Abstract: We present an extensive investigation of the charge-trapping processes in vertical GaN nanowire FETs with a gate-all-around structure. Two sets of devices were investigated: Gen1 samples have unipolar (n-type) epitaxy, whereas Gen2 samples have a p-doped channel and an n-p-n gate stack. From experimental results, we demonstrate the superior performance of the transistor structure with a p-GaN channel/Al2O3 gate insulator in terms of dc performance. In addition, we demonstrate that Gen2 devices have highly stable threshold voltage, thus representing ideal devices for power electronic applications. Insight into the trapping processes in the two generations of devices was obtained by modeling the threshold voltage variations via differential rate equations.

Fig. a) The p-channel device (Gen2) comprises a 2.5 lm n-GaN buffer layer, a 0.5 lm p-GaN channel layer, 0.73 lm n-GaN and 0.5 lm n p-GaN as the top layer, and 25 nm-Al2O3 as the gate dielectric.

b) SEM images of a nanowire of the p-channel device (Gen2) and bird’s-eye view of vertically aligned n-p-n GaN nanowire (NW) arrays with top contacts.

Aknowledgement: This work was supported in part by NoveGaN (Univ. of Padova) through the STARS CoG Grants call. Ack prog. Eccellenza. This research was partly performed within project INTERNET OF THINGS: SVILUPPI METODOLOGICI, TECNOLOGICI E APPLICATIVI and co-funded (2018–2022) by the Italian Ministry of Education, Universities and Research (MIUR) under the aegis of the “Fondo per il finanziamento dei dipartimenti universitari di eccellenza” initiative (Law 232/2016). Financial support from the German Research Foundation (DFG) of 3D GaN project and the Lower Saxony Ministry of Science and Culture (N-MWK) of LENA-OptoSense group is highly acknowledged for the development of vertical GaN nanowire FETs.

[Survey] Power Amplifiers Performance 2000-Present

Fifth web release on 2020/10/15: "PA_Survey_v5". This version-5 dataset includes PAs/transmitters from 500MHz to 1.5 THz in Bulk/SOI CMOS, SiGe, LDMOS, InP, GaN, GaAs technologies. The dataset contains total 3207 data points with over 1200 data points for CMOS, SiGe PAs and over 1500 data points for GaN, GaAs, InP PAs.

We have added sub-THz/THz power/signal generation circuits from 15GHz to 1.5THz, including PAs, fundamenal/harmonic oscillators, and frequency multipliers, to support the emerging research on beyond-5G/6G applications.

The file "PA_Survey_v5" is the version-5 dataset that includes ALL the reported PA/transmitter data since 2000 over frequency and various technologies. It also includes summary plots on CW Psat vs. Carrier Frequency for different technologies, peak PAE vs. CW Psat at different frequencies, and average PAE vs. average Pout for high-order complex modulations.

What is new in version-5 release beyond the version-4 release? 500MHz to 1.5 THz Power Amplifier designs and sub-THz/THz power/signal generation circuits published between 02/2020 and 10/2020.

• Cite this PA survey: Hua Wang, Tzu-Yuan Huang, Naga Sasikanth Mannem, Jeongseok Lee, Edgar Garay, David Munzer, Edward Liu, Yuqi Liu, Bryan Lin, Mohamed Eleraky, Sensen Li, Fei Wang, Amr S. Ahmed, Christopher Snyder, Sanghoon Lee, Huy Thong Nguyen, and Michael Edward Duffy Smith, "Power Amplifiers Performance Survey 2000-Present," [Online]. Available: https://gems.ece.gatech.edu/PA_survey.html
• Acknowledgement: We would like to sincerely thank many of our friends and colleagues for their helpful suggestions and insightful discussions.
• Feedback and Suggestions: We welcome your feedback and suggestions, including the ways to interpret and present the data. In addition, although we try to be as inclusive as possible when collecting these published data, it is certainly possible that we may miss some representative PA designs. Please feel free to send us feedback, suggestions, or missing PA papers.
• Contact: Please contact us through poweramplifiers.survey at gmail dot com. Do not use my gatech email address, since I may very likely miss your email.
• Source for this data collection: We focus on peer-reviewed and publicly accessible publications that are typical forums for PAs, including IEEE ISSCC, JSSC, RFIC, VLSI, CICC, ESSCIRC, IMS, T-MTT, TCAS, BCTM/CSICS (BCICTS in the future), APMC, EuMC, and MWCL. We also focus on public product datasheets on PAs/transmitters.

 

 

[paper] Scaled GaN-HEMT Large-Signal Model Based on EM Simulation

Scaled GaN-HEMT Large-Signal Model Based on EM Simulation

Wooseok Lee¹, Hyunuk Kang¹, Seokgyu Choi², Sangmin Lee², Hosang Kwon³, Keum cheol Hwang¹, Kang-Yoon Lee¹ and Youngoo Yang¹

Electronics 2020, 9(4), 632

DOI: 10.3390/electronics9040632

¹Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea
²Wavice Inc., Hwaseong-si 18449, Korea
³Agency for Defense Development, Daejeon 34186, Korea

Abstract This paper presents a scaled GaN-HEMT large-signal model based on EM simulation. A large-signal model of the 10-finger GaN-HEMT consists of a large-signal model of the two-finger GaN-HEMT and an equivalent circuit of the interconnection circuit. The equivalent circuit of the interconnection circuit was extracted according to the EM simulation results. The large-signal model for the two-finger device is based on the conventional Angelov channel current model. The large-signal model for the 10-finger device was verified through load-pull measurement. The 10-finger GaN-HEMT produced an output power of about 20 W for both simulation and load-pull measurements. 

Fig: Two-finger GaN-HEMT: a) layout; b) equivalent SPICE subcircuit

Acknowledgement: The research reported in this work has been supported by ADD (Agency of Defense Development) of Korea under an R&D program (UC170025FD).

[webinar] GaN HEMT Devices Characterization Using ASM-HEMT Model

ASM-HEMTモデルを使ったGaN HEMTデバイスの特性評価とモデリング

お知らせ: キーサイト・テクノロジーのウェブセミナー「ASM-HEMTモデルを使ったGaN HEMTデバイスの特性評価とモデリング 」

ライブウェブセミナーの日付: 2020年10月14日

ライブウェブセミナーの時刻: 10:45 JST

[paper] Compact Modeling of GaN HEMTs

Y. Chen et al., "Compact Modeling of THZ Photomixer Made from GaN HEMT," 2020 IEEE International Conference on Advances in Electrical Engineering and Computer Applications (AEECA), Dalian, China, 2020, pp. 484-489, doi: 10.1109/AEECA49918.2020.9213681.

Y. Chen et al., "A Surface Potential Based Compact Model for GaN HEMT I-V and CV Simulation," 2020 IEEE International Conference on Advances in Electrical Engineering and Computer Applications (AEECA), Dalian, China, 2020, pp. 490-495, doi: 10.1109/AEECA49918.2020.9213674.

A. Zhang et al., "Compact Modeling of Capacitance Components for GaN HEMTs," 2020 IEEE International Conference on Advances in Electrical Engineering and Computer Applications (AEECA), Dalian, China, 2020, pp. 505-511, doi: 10.1109/AEECA49918.2020.9213571.

FIG: Simplified GaN HEMT Structure

[slides] (Ultra-) Wide-Bandgap Devices

(Ultra-) Wide-Bandgap Devices: Reshaping the Power Electronics Landscape

Presenter Dr. Yuhao Zhang, Assistant Professor,
Center for Power Electronics Systems, Virginia Tech

IEEE EDS SCV-SF Seminar 

Friday, June 12, 2020 at 12PM – 1PM PDT

Abstract: Power electronics is the application of solid-state electronics for the control and processing of electrical energy. It is used ubiquitously in consumer electronics, electric vehicles, data centers, renewable energy systems, and smart grid. The power semiconductor device, as the cornerstone technology in power electronics, is key to improving the efficiency, cost and form factor of power electronic systems.  Recently, the power electronics landscape has been significantly reshaped with the production and application of power devices based on wide-bandgap (WBG) semiconductors, such as gallium nitride (GaN) and silicon carbide (SiC). Besides advancing the performance of traditional power systems, WBG devices have also enabled many emerging applications that are beyond the realm of silicon (Si) as well as changed the manufacturing paradigm of power electronics. On the horizon is the power devices based on ultra-wide-bandgap (UWBG) materials, which promises superior performance over GaN and SiC and is at the relatively early stage of research development.  This talk will provide a comprehensive overview of major WBG and UWBG power device technologies, spanning materials, devices, reliability and applications. Some research projects in the PI’s group in collaboration with industry will also be introduced.

FIG: WBG Semiconductor: Superior Power Semiconductor Over Si

The seminar presentation is now available on our IEEE EDS SCV-SF webpage:
http://site.ieee.org/scv-eds/files/2020/06/SCV_SF_EDS_Yuhao_Zhang_excerpt.pdf

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[paper] GaN/AlGaN 2DEGs grown on bulk GaN

Luisa Krückeberg¹,  Steffen Wirth²,  Victor V. Solovyev³, Andreas Großer¹, Igor V. Kukushkin^3,4,  Thomas Mikolajick^1,5, and  Stefan Schmult⁵

Quantum and transport lifetimes in optically induced GaN/AlGaN 2DEGs

grown on bulk GaN

Journal of Vacuum Science and Technology B 38, 042203 (2020)

DOI: 10.1116/1.5145198

¹NaMLab GmbH, Dresden (D)
²Max-Planck-Institute for Chemical Physics of Solids, Dresden (D)
³Institute of Solid State Physics RAS, Moscow (RU)
⁴National Research University Higher School of Economics, Moscow (RU)
⁵Institute of Semiconductors and Microsystems, TU Dresden, Dresden (D)

ABSTRACT A two-dimensional electron gas (2DEG) is absent in ultrapure GaN/Al0.06Ga0.94N heterostructures grown by molecular beam epitaxy on bulk GaN at 300 K and in the dark. However, such a 2DEG can be generated by UV illumination and persists at low temperature after blanking the light. Under steady UV illumination as well as under persistence conditions, pronounced quantum transport with Shubnikov–de Haas oscillations commencing below 2 T is observed. The low temperature 2DEG mobility amounts to only ∼20 000 cm2/V s, which is much lower than predicted for the dominant scattering mechanisms in GaN/AlGaN heterostructures grown on GaN with low threading dislocation density. A rather small ratio of the transport and quantum lifetimes τt/τq of ∼10 points at elastic scattering events limiting both the transport and quantum lifetimes.

FIG. (a) Photograph of a Hall bar device and (b) its two-terminal resistance R2pt at stabilized temperatures between 120 and 135K. The estimated UV power during illumination is in the low nanowatts range, which does not result in a saturation of R2pt at these specific temperatures. The recombination time, i.e., the time until disappearance of the 2DEG, increases significantly at 120K. At 100 K, no increase in R2pt is observed after switching off the illumination.

ACKNOWLEDGMENTS The NaMLab gGmbH part was financially supported by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation)—Project No. 405782347, the German Federal Ministry of Education and Research—BMBF (Project “ZweiGaN,” No. 16ES0145K), and the German Federal Ministry of Economics and Technology—BMWi (Project No. 03ET1398B). V.V.S. and I.V.K. acknowledge the support from the Russian Science Foundation (Grant No. 19-42-04119). The TU Dresden part of the work was partially funded by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation)—Project No. 348524434.