[paper] Parameter Extraction Approaches for Memristor Models

Dmitry Alexeevich Zhevnenko^1,2, Fedor Pavlovich Meshchaninov^1,2, Vladislav Sergeevich Kozhevnikov^1,2, Evgeniy Sergeevich Shamin^1,2, Oleg Alexandrovich Telminov^1,2, and Evgeniy Sergeevich Gornev^1,2

Research and Development of Parameter Extraction Approaches for Memristor Models

Micromachines 2021, 12, 1220. 

DOI: 10.3390/mi12101220

   
1 Moscow Institute of Physics and Technology, Moscow, Russia;
2 JSС MERI, Zelenograd, Russia

Abstract: Memristors are among the most promising devices for building neural processors and non-volatile memory. One circuit design stage involves modeling, which includes the option of memristor models. The most common approach is the use of compact models, the accuracy of which is often determined by the accuracy of their parameter extraction from experiment results. In this paper, a review of existing extraction methods was performed and new parameter extraction algorithms for an adaptive compact model were proposed. The effectiveness of the developed methods was confirmed for the volt-ampere characteristic of a memristor with a vertical structure: TiN/HfxAl1-xOy/HfO2/TiN.

Fig: Model VACs with different numbers of inhomogeneities: 

(a) four inhomogeneities; (b) no inhomogeneities.

Acknowledgments: This research was funded by the Ministry of Science and Higher Education of the Russian  Federation, grant number 075-15-2020-791. Authors thank the Institute of Microelectronics Technology and High-Purity Materials RAS for access to experimental data on the study of graphene oxide memristor switching cycles.

[Photos] MOS-AK LADEC Mexico April 18, 2021

Arbeitskreis Modellierung von Systemen und Parameterextraktion

Modeling of Systems and Parameter Extraction Working Group

MOS-AK LAEDC Workshop

(virtual/online) April 18, 2021

Together with local Host and LAEDC Organizers as well as all the Extended MOS-AK TPC Committee, we have organized the 3rd subsequent MOS-AK/LAEDC workshop which was the Virtual/Online event. There are a couple of the event photos:

MOS-AK Session 1 (APR.18) begun: 8:00am Mexico time zone (GMT-5)

T_1 FOSSEE eSIM: An open source CAD software for circuit simulation

Kannan Moudgalya

IIT Bombay (IN)

T_2 Memristor modeling

Arturo Sarmiento

INAOE (MX)

T_3 Modeling Issues for CMOS RF ICs

Roberto Murphy, Jose Valdes and Reydezel Torres

INAOE (MX)

T_4 Improving Time-Dependent Gate Breakdown of GaN HEMTs with p-type Gate

E. Sangiorgi, A. Tallarico, N. Posthuma, S. Decoutere, C. Fiegna

Universita di Bologna

MOS-AK Session 2 (APR.18) begun: 1:00pm Mexico time zone (GMT-5)

T_5 Compact Models of SiC and GaN Power Devices

Alan Mantooth, Arman Ur Rashid, Md Maksudul Hossain

University of Arkansas (US)

T_6 New analytical model for AOSTFTs

Antonio Cerdeira

CINVESTAV-IPN, Mexico City (MX)

T_7 On the Parameter Extraction of Thin-Film Transistors in Weak-Conduction

Adelmo Ortiz-Conde

Solid State Electronics Laboratory, Simon Bolivar University, Caracas (VE)

End of MOS-AK Workshop
Group Photo

[paper] TCAD modeling of neuromorphic systems based on ferroelectric tunnel junctions

Yu He, Wei-Choon Ng and Lee Smith

TCAD modeling of neuromorphic systems based on ferroelectric tunnel junctions

J Comput Electron (2020)

DOI: 10.1007/s10825-020-01544-z

Abstract: A new compact model for HfO2-based ferroelectric tunnel junction (FTJ) memristors is constructed based on detailed physical modeling using calibrated TCAD simulations. A multi-domain configuration of the ferroelectric material is demonstrated to produce quasi-continuous conductance of the FTJ. This behavior is demonstrated to enable a robust spike-timing-dependent plasticity-type learning capability, making FTJs suitable for use as synaptic memristors in a spiking neural network. Using both TCAD–SPICE mixed-mode and pure SPICE compact model approaches, we apply the newly developed model to a crossbar array configuration in a handwritten digit recognition neuromorphic system and demonstrate an 80% successful recognition rate. The applied methodology demonstrates the use of TCAD to help develop and calibrate SPICE models in the study of neuromorphic systems.

Fig: Electric field–polarization relationship. Solid line: multi-domain simulation; dashed line: single-domain simulation; dot: measurement 

[paper] SPICE Model for Bipolar Resistive Switching Devices

Miranda, Enrique, and Jordi Suñé

Departament d’Enginyeria Electrònica,

UAB, 08193 Barcelona, Spain

Fundamentals and SPICE Implementation of the Dynamic Memdiode Model

for Bipolar Resistive Switching Devices

(2020 - techrxiv.org)

Abstract: This paper reports the fundamentals and SPICE  implementation of the dynamic memdiode model (DMM) for the  conduction characteristics of bipolar resistive switching (RS)  devices. Following Chua’s memristive devices theory, the  memdiode model comprises two equations, one for the electron  transport based on a heuristic extension of the quantum pointcontact model for filamentary conduction in dielectrics and a  second equation for the internal memory effect related to the  reversible displacement of atomic species within the oxide film.  The DMM represents a breakthrough with respect to the previous  quasi-static memdiode model (QMM) since it describes the  memory state of the device as a rate balance equation  incorporating both the snapback and snapforward effects,  features of utmost importance for the accurate and realistic  simulation of the RS phenomenon. The DMM allows simple setting  of the memory state initial condition as well as separate modeling  of the set and reset transitions. The model equations are  implemented in the LTSpice simulator using an equivalent  circuital approach with behavioral components and sources. The  practical details of the model implementation and its use are  thoroughly discussed.   

Fig: Hysteretic behavior of the filamentary-type I-V characteristic.

Filament stages: A) formation, high resistance state (HRS), B) completion, C) expansion,

D,F) complete expansion, low resistance state (LRS), G) dissolution, I) rupture.

Supplementary information: The memdiode model script for LTSpice XVII reported in this Appendix includes not only the DMM but also the QMM. It is important to activate one of the options at a time (DMM or QMM) by inserting asterisks (*) in the corresponding lines. The parameter list, I-V, and Auxiliary functions sections are common to both approaches. This does not mean that the obtained curves will be identical. The meaning of the parameters is discussed in the text and in previous papers.

LTSPICE script

.subckt memdiode + - H

*created by E.Miranda & J.Suñé, June 2020

.params

+ H0=0 ri=50

+ etas=50 vs=1.4

+ etar=100 vr=-0.4

+ imax=1E-2 amax=2 rsmax=10

+ imin=1E-7 amin=2 rsmin=10

+ vt=0.4 isb=200E-6 gam=1 gam0=0 ;isb=1/gam=0 no SB/SF

+ CH0=1E-3 RPP=1E10 I00=1E-10

*Dynamic model

BV A 0 V=if(V(+,-)>=0,1,0)

RH H A R=if(V(+,-)>=0,TS(V(C,-)),TR(V(C,-)))

CH H 0 1 ic={H0}

*Quasi-static model

*BH 0 H I=min(R(V(C,-)),max(S(V(C,-)),V(H))) Rpar=1

*CH H 0 {CH0} ic={H0}

*I-V

RE + C {ri}

RS C B R=RS(V(H))

BD B - I=I0(V(H))*sinh(A(V(H))*V(B,-))+I00

RB + - {RPP}

*Auxiliary functions

.func I0(x)=imin+(imax-imin)*limit(0,1,x)

.func A(x)=amin+(amax-amin)*limit(0,1,x)

.func RS(x)=rsmin+(rsmax-rsmin)*limit(0,1,x)

.func VSB(x)=if(x>isb,vt,vs)

.func ISF(x)=if(gam==0,1,pow(limit(0,1,x),gam)-gam0)

.func TS(x)=exp(-etas*(x-VSB(I(BD))))

.func TR(x)= exp(etar*ISF(V(H))*(x-vr))

.func S(x)=1/(1+exp(-etas*(x-VSB(I(BD)))))

.func R(x)=1/(1+exp(-etar*ISF(V(H))*(x-vr)))

.ends

Acknowledgements: This work was funded by the WAKeMeUP 783176 project, co‐ funded by grants from the Spanish Ministerio de Ciencia, Innovación y Universidades (PCI2018‐093107 grant) and the ECSEL EU Joint Undertaking and by project TEC2017-84321- C4-4-R funded by the Spanish Ministerio de Ciencia, Innovación y Universidades. Dr. G. Patterson and Dr. A. Rodriguez are greatly acknowledged for their contributions to the development of the ideas reported in this work

[paper] Well-Posed Models of Memristive Devices

Well-Posed Models of Memristive Devices

Tianshi Wang, Jaijeet Roychowdhury

(Submitted on 15 May 2016)

Existing compact models for memristive devices (including RRAM and CBRAM) all suffer from issues related to mathematical ill-posedness and/or improper implementation. This limits their value for simulation and design and in some cases, results in qualitatively unphysical predictions. We identify the causes of ill-posedness in these models. We then show how memristive devices in general can be modelled using only continuous/smooth primitives in such a way that they always respect physical bounds for filament length and also feature well-defined and correct DC behaviour. We show how to express these models properly in languages like Verilog-A and ModSpec (MATLAB). We apply these methods to correct previously published RRAM and memristor models and make them well posed. The result is a collection of memristor models that may be dubbed "simulation-ready", i.e., that feature the right physical characteristics and are suitable for robust and consistent simulation in DC, AC, transient, etc., analyses. We provide implementations of these models in both ModSpec/MATLAB and Verilog-A.

Subjects: Emerging Technologies (cs.ET); Computational Engineering, Finance, and Science (cs.CE)
Cite as: arXiv:1605.04897 [cs.ET]
(or arXiv:1605.04897v1 [cs.ET] for this version)

Are memristors the future of Artifical Intelligence?

Read more...