Showing posts with label memristors. Show all posts
Showing posts with label memristors. Show all posts

Jul 6, 2021

[paper] Polymer/TiO2 Nanorod Nanocomposite Optical Memristor Device

A. H. Jaafar, M. M. Al Chawa, F. Cheng, S.M. Kelly, R. Picos, R. Tetzlaff, and N. T. Kemp
Polymer/TiO2 Nanorod Nanocomposite Optical Memristor Device
J. Phys. Chem. C 2021, XXXX, XXX, XXX-XXX
Publication Date: June 30, 2021
DOI: 10.1021/acs.jpcc.1c02799

Abstract: Modulation of resistive switching memory by light opens the route to new optoelectronic devices that can be controlled both optically and electronically. Applications include integrated circuits with memory elements switchable by light and neuromorphic computing with optically reconfigurable and tunable synaptic circuits. We report on a unique nanocomposite resistive switching material and device made from a low concentration (∼0.1% by mass) of titanium dioxide nanorods (TiO2-NRs) embedded within the azobenzene polymer, poly(disperse red 1 acrylate, PDR1A). The device exhibits both reversible electronic memristor switching and reversible polarization-dependent optical switching. Optical irradiation by circularly polarized light causes a trans–cis photochemical isomerization that modifies the conformation and orientation of the photoactive azo-unit within the polymer. The resulting expansion of the composite (PDR1A/TiO2-NR) polymer film modifies the conduction pathway, facilitated by the presence of the TiO2-NRs, as a semiconductor material, through the (PDR1A/TiO2-NR) polymer film, which provides a sensitive means to control resistive switching in the device. The effect is reversible by changing the polarization state of the incident light. A charge-flux memristor model successfully reproduces the current–voltage hysteresis loops and threshold switching properties of the device, as well as the effect of the illumination on the electrical characteristics.

Fig: Polymer/TiO2 Nanorod Nanocomposite Optical Memristor Device





Sep 21, 2020

[paper] Memristors in SPICE

Modeling networks of probabilistic memristors in SPICE
Vincent J. Dowling1, Valeriy A. Slipko2, Yuriy V. Pershin1
arXiv:2009.05189v1 [cs.ET] 11 Sep 2020
DOI: 10.13164/re.2020.0001

1Department of Physics and Astronomy, University of South Carolina, Columbia, SC 29208 USA
2Institute of Physics, Opole University, Opole 45-052, Poland

Abstract. Efficient simulation of probabilistic memristors and their networks requires novel modeling approaches. One major departure from the conventional memristor modeling is based on a master equation for the occupation probabilities of network states. In the present article, we show how to implement such master equations in SPICE. In the case studies, we simulate the dynamics of ac-driven probabilistic binary and multi-state memristors, and dc-driven networks of probabilistic binary and multi-state memristors. Our SPICE results are in perfect agreement with known analytical solutions. Examples of LTspice codes are included.
Fig: Ac-driven probabilistic binary memristor: (a) simulated circuit, (b) schematics of SPICE model, and (c) example of current-voltage curves found with SPICE simulations. The listing of SPICE model is given in Apendix.

Appendix: SPICE code examples
B1 0 p0 I=-gm(tau01,V01,V(Va))*V(p0)*u(V(Va))+gm(tau10,V10,-V(Va))*V(p1)*u(-V(Va))
B2 0 p1 I=gm(tau01,V01,V(Va))*V(p0)**u(V(Va))-gm(tau10,V10,-V(Va))*V(p1)**u(-V(Va))
C1 p0 0 1 IC=1
C2 p1 0 1 IC=.0
R2 Va 0 1k
R1 Va 0 10k
R3 VI 0 1k
B3 0 VI I=I(R1)*V(p0)+I(R2)*V(p1)
V1 Va 0 SINE(0 1 200 0 0 0 0)
.FUNC gm(x,y,z)1/(x*exp(-z/y))
.param tau01=3E5 V01=.05
.param tau10=3E5 V10=.05
.tran 0 .1 0.05 10E-7
.backanno
.end

Nov 4, 2014

IEEE Swiss CAS/ED Workshop 2014 on Memristive Devices and Neuromorphic Applications

 IEEE Swiss CAS/ED Workshop 2014 on Memristive Devices and Neuromorphic Applications 
 (http://www.ieee.ch/chapters/cas-ed/cas-ed-news/2014-11-27/) 

Date: Friday 28 Nov, 2014
Time: 10:00-19:00
Place: UZH, Irchel Campus, Room Y35 F51 (morning session) Y10 03/04 (afternoon session), Building 55 Foyer (apero). Closest tram stop is Tram 9/10 at Irchel. See here for University of Zurich map.

At this one day workshop, experts in Memristive Devices and Neuromorphic Applications will present their recent advances in Circuits and Systems and Electron Devices. The workshop includes a demo and poster session, and a concluding apero.

Resistive memory devices also known as "memristors" are being actively researched to address the widening gap in performance between storage and the rest of the computing system. There is also a potential for such devices to serve simultaneously as both memory and logic, or even as components of a neuromorphic computing hardware based on brain architecture. The investigation of the use of these devices in a host of applications in science and technology are currently being explored. Swiss developers are very active in these fields and the area of neuromorphic computing. This one-day IEEE workshop brings them together with potential research and development partners and end users in industry and academia.

The presentations will cover a range of topics focus on memristive technology and possible computing applications. A poster session including demonstrations of relevant technologies will also be offered.

All presentations will be in English.

Registration: Registration is open to the public but is mandatory. There will be a registration fee which includes lunch and apero. Please register at www.iniforum.ch/casedws14/registration.php.

Registration will be closed by 14.11.2014 or when the maximum number of places is reached. Registration must be cancelled by 21.11.2014 for refund.

Posters and Demos registration: We invite demos and posters. Poster or demo presentations must also register for the workshop (see above). Posters or demos must be registered so that we can plan space for them. Please use this demo and registration form to register.