U.S.-Japan Collaborative Workshop on Advanced Integrated Circuit Design
(Phase 2)
Fukuoka System LSI Development Center 2F
May 14 - May 15, 2024
https://www.kerc.or.jp/seminar/2024/04/5145152.html
In recent years, R&D and investment in semiconductors have become more active in countries around the world, and at the same time, the need for human resource development has been pointed out. In Japan in particular, the construction and attraction of factories for semiconductor "manufacturing" is accelerating, and various activities are being developed, but in the future, it is necessary to accelerate discussions on semiconductor "design". Against this backdrop, with the support of the U.S. Consulate in Fukuoka, we decided to hold a workshop in collaboration with the U.S. In December 2023, we held the U.S.-Japan Collaborative Workshop on Circuit Design (Phase 1), a state-of-the-art integrated circuit design, with the aim of learning about the latest situation in both countries through lectures on cutting-edge design technology and human resource development in Japan and the United States, as well as discussing the future direction and possibilities for international collaboration. We cover a wide range of topics, including open IC design, advanced analog and digital circuit design, generative AI processing (LLM) acceleration, optical circuit design, cryogenic classical and quantum computing, and new device technologies. Hybrid format (lectures can be held at Fukuoka venues and ZOOM Webinars), free of charge, with simultaneous English-Japanese interpretation. Therefore, it is a form that is easy to participate in. This is a good opportunity to learn about global trends, so not only those who specialize in semiconductors, but also those who are even a little interested in semiconductors, please join us. Students are also welcome to participate! In addition, we plan to have a simple hands-on session in the tutorial session, so if you are interested, please bring / prepare a laptop.
Outline of the event
Date & Time
DAY-1: May 14, 2024 10:00 a.m. ~ 4:00p.m.
DAY-2: May 15, 2024 10:00 a.m. ~ 4:05 p.m.
Hybrid format (lectures can be held at Fukuoka venues and ZOOM Webinars)
Online (Zoom Webinars)
Fukuoka Venue: Fukuoka System LSI Development Center 2F
(〒814-0001 3-8-33 Momochihama, Sawara-ku, Fukuoka City)
There is no parking lot at the venue, so if you come by car, please use the
nearby paid parking lot.
Participation Fee:
free
Application
[Application deadline: May 13]
Please apply from the link below (you can also apply for either Day-1 or Day-2 only). Simultaneous interpretation in English and → is available at the Fukuoka venue and ZOOM Webinars. The first 70 people to participate at the Fukuoka venue and the first 400 people to participate in the ZOOM Webinar will be closed to the first 400 people. If you wish to cancel after applying for the Fukuoka venue, please contact us as soon as possible. In addition, we are planning a simple hands-on, so please bring your laptop (you can participate without a laptop).
Application Form
Program Details
(subject to update) https://www.kerc.or.jp/seminar/2024/04/5145152.html
Day-1: May 14, 10:00-16:00 (JST)
10:00 - 10:05 Opening Remark and Overview of the Workshop, Mehdi Saligane/Koji Inoue, University of Michigan/Kyushu University
[Morning Session: Invited Talks]
10:05 - 10:10 Welcome Remarks from the U.S. Consulate in Fukuoka
10:10 - 10:55 LLMs on ASICs, Greg Kielian/Kauna Lei, Google Research
11:00 - 11:45 Teaching Mixed-Signal Design Using Open-Source Tools, Boris Murmann, University of Hawaii
11:45 - 13:00 Lunch Break
[Afternoon Session: Tutorials]
13:00 - 14:00 Photonic and Analog circuits with GDSFactory, Joaquin Matres/Troy Tamas, Google X/DoPlayDo, Inc.
14:00 - 14:15 Break
14:15 - 15:45 ReaLLMASIC: Build your own Lightweight LLM, Gregory Kielian/Kauna Lei/Shiwei Liu/Mehdi Saligane, Google Research/University of Michigan
15:45 - 16:00 Conclusion, Mehdi Saligane, University of Michigan
Day-2: May 15th, 10:00-16:05 (JST)
10:00 - 10:05 Opening Remark and Overview of Day-2 Workshop, Mehdi Saligane/Koji Inoue, University of Michigan/Kyushu University
[Morning Session: Invited Talks]
10:05 - 10:50 Superconductor Computer Architecture: from Classical to Quantum, Ilkwon Byun, Kyushu University
10:50 - 11:35 Overview of new devices in the era of Beyond CMOS, Sadayuki Yoshitomi, Megachips
11:35 - 13:00 Lunch Break
[Afternoon Session: Tutorials]
13:00 - 13:55 (Tentative: GLayout), Anhang Li/Boris Murmann/Mehdi Saligane, University of Michigan/University of Hawaii
13:55 - 14:50 (Tentative: XLS: High-Level Synthesis), Johan Euphrosine, Google
14:50 - 15:05 Break
15:05 - 16:00 Pitfalls of Open-Source Chip Design Verification, Mitch Bailey, Efabless/ShuhariSystem
16:00 - 16:05 Conclusion and Overview of the phase-2 workshop activities, Mehdi Saligane/Koji Inoue, University of Michigan/Kyushu University
Organizer University of Michigan
Kyushu University System LSI Research Center Kyushu University
Quantum Computing Systems Research Center Kyushu University
Value Creation Semiconductor Human Resource Development Center
Co-organizers
Fukuoka Prefectural Foundation for the Promotion of Industry, Science and Technology Kyushu Economic Research Association
Sponsor
U.S. Consulate in Fukuoka
Inquiries
ic-design-ws 'at' slrc.kyushu-u.ac.jp (replace 'at' with @)
Okano, Business Development Department, TEL: 092-721-4907
Seminatec 2023
