[PhD] Transient Simulation of Frequency Domain Devices in Gnucap

Adding transient simulation of frequency domain devices to the Gnucap circuit simulator

Phd Thesis by Seán Higginbotham

Supervisor: Assistant Prof. Justin King

April 2024

Trinity College Dublin, The University of Dublin

College Green, Dublin 2, Ireland

Abstract: Radio frequency design constitutes a dominant element in the development of key communications technologies. Having accurate, robust, and widely accessible simulation methods is critical to ensuring continued advancements in this field, and guaranteeing the associated infrastructural and societal shifts that such technologies enable.

High frequency circuits invariably contain multiple non-linear components, which are naturally dealt with via time marching simulation of their time-domain analytic equations. However, including this alongside linear, generally dispersive, devices and effects, which are typically only characterised through a set of frequency-domain data describing the scattering response of an associated port-network, has traditionally been a problem for designers. Frequency-domain methods such as the harmonic balance technique and its successors have dominated radio frequency design for decades. However, such methods exhibit disadvantages in the context of modern circuits which are increasingly non-linear, and which operate with increasingly complicated modulated signals.

Various alternatives have been proposed, though as of yet no universally accepted method has emerged. Though harmonic balance will likely not be replaced, this project seeks to implement one such pure transient technique as an alternative. The proposed technique is based on using the vector-fitting algorithm to produce a model of the frequency response of the linear portnetwork, and then using a recursive convolution formulation to allow the time-domain response to be efficiently obtained from the port’s impulse response. An equivalent circuit companion model is developed from the resulting time-domain power-wave relation. This companion model allows the linear device to be directly included in a transient simulation alongside the analytic non-linear components, by way of providing a manner of computing the voltage and current on the network’s ports.

We implement the technique for one-port networks in a circuit driven by baseband signals. It is added to the free, open-source Gnucap circuit simulator as a ‘device plugin’. This report details how the implementation was done and provides results illustrating that it works as intended; the plugin can be installed by a user, who simply provides it with a file of frequency-domain data representing the port-network, and the plugin works naturally with the Gnucap transient solver to allow obtaining a transient solution of the overall circuit. A pure transient technique such as this does not require limiting assumptions or approximations on any components in the circuit and they are therefore preferable in certain contexts to frequency-domain methods like harmonic balance.

The project offers a significant contribution towards increasing the accessibility of radiofrequency electronics design and teaching.

 FIG: Summary of the traditional approach to simulating RF/MW circuits via HB, and the proposed pure transient approach implemented in this PhD Thesis

Acknowledgements: Seán Higginbotham would like to thank my M.A.I supervisor Dr. Justin King, whose previous work was the basis for this project. He provided invaluable insights and guidance which made the project both possible and an enjoyable experience, instilling curiosity at each discussion. Relevant academic references are included in the bibliography section. Acknowledgements of the dependancies used in the project code follow.

Gnucap is the creation of Albert Davis and is developed by him and others. It is provided under the GNU GPLv3, which is also the license that this project code is provided under on the associated GitHub repository.

See https://www.gnu.org/licenses/gpl-3.0.html. For the GNU GPLv3 license. Additionally, see the Gnucap repository here https://savannah.gnu.org/projects/ gnucap/.

LAPACK is a co-creation of The University of Tennessee and The University of Tennessee Research Foundation, The University of California Berkeley, and The University of Colorado Denver. See the user guide here https://netlib.org/lapack/.

The LAPACKE C bindings are the creation of Intel Corp.

The relevant licensing files are found within the source code and on the respective website.

Should the reader of this report have any questions or suggestions, please feel free to reach out at higginbs@tcd.ie, or via other channels such as the project GitHub located at https: //github.com/SHigginbotham/transient-sparam-gnucap. The project supervisor may also be of interest, available at justin.king@tcd.ie.

[Overview] Radiation Damage Effects in Microelectronic Devices

Yanru Ren1, Min Zhu¹, Dongyu Xu^1,2, Minghui Liu¹, Xuehui Dai¹, Shengao Wang1,
and Longxian Li¹

Overview on Radiation Damage Effects and Protection Techniques in Microelectronic Devices

Review Article; Open Access; Volume 2024; Article ID 3616902; 

DOI 10.1155/2024/3616902

1 Naval University of Engineering, Wuhan 430033, China
2 PLA Unit 91049, Sanya 572000, China

Abstract: With the rapid advancement of information technology, microelectronic devices have found widespread applications in critical sectors such as nuclear power plants, aerospace equipment, and satellites. However, these devices are frequently exposed to diverse radiation environments, presenting significant challenges in mitigating radiation-induced damage. Hence, this review aims to delve into the intricate damage mechanisms of microelectronic devices within various radiation environments and highlight the latest advancements in radiation-hardening techniques. The ultimate goal is to bolster the reliability and stability of these devices under extreme conditions. The review initiates by outlining the spectrum of radiation environments that microelectronic devices may confront, encompassing space radiation, nuclear explosion radiation, laboratory radiation, and process radiation. It also delineates the potential damage types that these environments can inflict upon microelectronic devices. Furthermore, the review elaborates on the underlying mechanisms through which different radiation environments impact the performance of microelectronic devices, which includes a detailed analysis of the characteristics and fundamental mechanisms of damage when microelectronic devices are subjected to total ionizing dose effects and single-event effects. In addition, the review delves into the promising application prospects of several key radiation-hardening techniques for enhancing the radiation tolerance of microelectronic devices.

FIG: The equivalent circuit of the EKV-RAD macromodel

Acknowledgments: The study was funded by Key Construction Projects of Academic Disciplines (430618) Construction Projects of Key Universities and Key Disciplines (430183).

IWPSD 2023

XXII International Workshop on Physics of Semiconductor Devices

Research Park, IIT Madras, Chennai - 600036

Dec. 13-17, 2023

organised by

Indian Institute of Technology Madras

@ Research Park, IIT Madras

in association with

Society for Semiconductor Devices (SSD)

Semiconductor Society (India)

The XXII International Workshop on the Physics of Semiconductor Devices (IWPSD 2023) is being jointly organized by the Indian Institute of Technology Madras in collaboration with Society for Semiconductor Devices and Semiconductor Society (India). This series of biennial workshops, started in 1981, provides a global forum for interaction between scientists and technologists working in the area of semiconductor materials and devices.

The topics to be covered in the Workshop are, but not limited to:

• 2D Materials and Devices
• Crystal Growth and Epitaxy
• Device Modelling and Simulation
• Devices for Quantum Technology
• II - VI and Oxide Semiconductors
• III - V Semiconductors
• Memory and Logic Devices
• MEMS, NEMS and Sensors
• Organic and Flexible Electronics
• Photovoltaics
• Power Semiconductor Devices
• Optoelectronics

IWPSD 2023 Registration is open. Registration fees includes admission to all conference sessions, daily lunch and tea breaks, conference kit and dinner/banquet.

Contact: <admin.iwpsd2023@ee.iitm.ac.in>

[workshop] QC:DCEP 2023

Workshop on

Quantum Computing: Devices, Cryogenic Electronics and Packaging

A Seasonal School of the IEEE Circuits & Systems Society

Tues/Wed, 24-25 October, 2023 at SEMI World Hdqtrs, Milpitas, CA USA

Welcome to the first year of this new Workshop from the IEEE Circuits and Systems Society, organized and run by three Silicon Valley IEEE chapters: Circuits and Systems, Electron Devices and Electronics Packaging.

QC:DCEP 2023 is planned to be a hybrid event, with both in-person and WebEx participation. Registration is now open. On-site seating is limited. Review the Advance Program.

The intent of this workshop is to bring together engineers of electrical, mechanical, materials and computer science disciplines and physicists to describe the state-of-the-art in all the interconnected fields and the opportunities and challenges for future generations of quantum computers.

Confirmed plenary and invited talks:

Technical Challenges facing Quantum Computing with Superconducting Transmon Qubits Dr. Daniel Tennant, Rigetting Computing		Superconducting Multi-Chip Module (SMCM) Rabindra N. Das, MIT Lincoln Laboratory
Introduction to Quantinuum and TKET Dr. Kathrin Spendier, Quantinuum		Understanding and Addressing Challenges in Superconducting Qubit Scale Jennifer Smith, UC-Santa Barbara
Integrated Quantum-Classical Applications with CUDA Quantum Dr. Jin-Sung Kim, NVIDIA		A 22nm FD-SOI-CMOS Scalable Quantum Processor SoC with Fully Integrated Control Electronics at 3.5K Dr. Imran Bashir, Equal1
Network Architecture for a Scalable Spin Qubit Processor Prof. Jonathan Baugh, Univ. of Waterloo		Quantum Computing with Silicon Spins Dr. Dominik Zumbuhl, Univ of Basel
Quantum Error Correction in Bosonic Qubits Marina Kudra, PhD, Intermodulation Products		Thermal Management Challenges in Cryogenic System Integration: Spin Qubit Biasing with a CMOS DAC at mK Temperature Lea Schreckenberg, Forschungszentrum Jülich GmbH

plus additional technical talks 

Drawings will be held for two GeForce RTX-4090 graphics cards, donated by NVIDIA — one will be awarded to an on-site speaker, while the other will be awarded to an on-site attendee. These new gaming accelerators for Windows PCs are not yet on sale. Need not be present to win. We invite you to register for QC:DCEP 2023 using our EventBrite site. Register today!

[book] Advanced Ultra Low-Power Semiconductor Devices

Advanced Ultra Low-Power Semiconductor Devices

Design and Applications

Edited by Shubham Tayal, Abhishek Kumar Upadhyay, Shiromani Balmukund Rahi, and Young Suh Song

ISBN: 9781394166411 | (C)2023  Hardcover | 306 pages

Description

This outstanding new volume offers a comprehensive overview of cutting-edge semiconductor components tailored for ultra-low power applications. These components, pivotal to the foundation of electronic devices, play a central role in shaping the landscape of electronics. With a focus on emerging low-power electronic devices and their application across domains like wireless communication, biosensing, and circuits, this book presents an invaluable resource for understanding this dynamic field.

Bringing together experts and researchers from various facets of the VLSI domain, the book addresses the challenges posed by advanced low-power devices. This collaborative effort aims to propel engineering innovations and refine the practical implementation of these technologies. Specific chapters delve into intricate topics such as Tunnel FET, negative capacitance FET device circuits, and advanced FETs tailored for diverse circuit applications.

Beyond device-centric discussions, the book delves into the design intricacies of low-power memory systems, the fascinating realm of neuromorphic computing, and the pivotal issue of thermal reliability. Authors provide a robust foundation in device physics and circuitry while also exploring novel materials and architectures like transistors built on pioneering channel/dielectric materials. This exploration is driven by the need to achieve both minimal power consumption and ultra-fast switching speeds, meeting the relentless demands of the semiconductor industry. The books scope encompasses concepts like MOSFET, FinFET, GAA MOSFET, the 5-nm and 7-nm technology nodes, NCFET, ferroelectric materials, subthreshold swing, high-k materials, as well as advanced and emerging materials pivotal for the semiconductor industrys future.

[C4P] EDTM Conference 2024, Bangalore

8th IEEE Electron Devices Technology and Manufacturing

EDTM Conference 2024

Theme: Strengthening Globalization in Semiconductors

Hilton Bangalore, India, March 3rd- 6th, 2024

https://ewh.ieee.org/conf/edtm/2024/

Call for Paper: We cordially invite you to submit ORIGINAL 3-page Camera-Ready papers to the 2024 IEEE Electron Devices Technology and Manufacturing (IEEE EDTM 2024) Conference for possible presentations. Original papers are sought on any topic within the scope of IEEE EDTM 2024. There are 14 R&D Tracks for IEEE EDTM 2024, among them:

TRACK 9. Modeling and Simulation (MS)

Advances in modeling/simulation of devices, packages and processes; Technology CAD and benchmarking; Atomistic process and device simulation; Compact models for DTCO and STCO; AI/ML-augmented modelling; Material and interconnect modeling; Models for photonic devices.

Important Dates for Authors

• Three-page camera-ready paper submission starts: August 1,2023
• Paper submission deadline: October 15, 2023 October 30, 2023 
• Notification for Acceptance: December 15, 2023

Accepted IEEE EDTM 2024 papers will be considered for competition for the Best Paper Award, Best Student Paper Awards and Best Poster Awards.

More details on paper submission can be found at the Paper Submission webpage.

[Proceedings] MNDCS 2023

Micro and Nanoelectronics Devices, Circuits and Systems

Select Proceedings of MNDCS 2023

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 1067) DOI: 10.1007/978-981-99-4495-8

Editors: Trupti Ranjan Lenka, Samar K. Saha, Lan Fu

This book presents select proceedings of the International Conference on Micro and Nanoelectronics Devices, Circuits and Systems (MNDCS-2023). The book includes cutting-edge research papers in the emerging fields of micro and nanoelectronics devices, circuits, and systems from experts working in these fields over the last decade. The book is a unique collection of chapters from different areas with a common theme and is immensely useful to academic researchers and practitioners in the industry who work in this field.

IEEE EDS MQ at NIT Silchar Silchar, Assam (IN)

IEEE EDS Mini-Colloquium 

on Micro/Nanoelectronics, Devices, Circuits and Systems, 

29-31 Jan 2023 (Hybrid Mode)

DATES	LOCATION	HOST	REGISTER
Date: 29 Jan 2023 Time:10:00AM to 06:00PM  (UTC+05:30)  Add Event to Calendar  iCal  Google Calendar	National Institute of Technology Silchar Dept of ECE, NIT Silchar Silchar, Assam India 788010 Building: ECE/CSE Building	National Inst of Technology - Silchar, ED15 Kolkata Section Chapter NANO42 Co-sponsored by Dr. Trupti R. Lenka	Starts Dec.1, 2022 Ends Jan.28,2023 No Admission Charge Register NOW

Agenda with following contribution Distinguished Lecturers: 

• Anil Kottantharayil (anilkg@ieee.org)
• Gananath Dash (gndash@ieee.org)
• Ajit Kumar Panda (akpanda62@hotmail.com)
• Manoj Saxena (msaxena@ieee.org)
• Brajesh Kumar Kaushik (bkkaushik23@gmail.com)
• Samar Saha (samar@ieee.org)
• Hiroshi Iwai (h.iwai@ieee.org)
• Taiichi Otsuji (taiichi.otsuji.e8@tohoku.ac.jp)
• Pei-Wen Li (pwli@nycu.edu.tw)
• Zhou Xing (EXZHOU@ntu.edu.sg)
• Albert Chin (albert_achin@hotmail.com)
• Mansun Chan (mchan@ust.hk)
• Chao-Sung LAI (cslai@mail.cgu.edu.tw)
• Wladek Grabinski, MOS-AK, EU (wladek@grabinski.ch)

Register NOW

UPCOMING – Winter School in III-Sb applications

UPCOMING

Winter School in III-Sb applications: non-volatile memories

A Modelling Perspective

QUANTIMONY’s Winter School in III-Sb Applications: non-volatile Memories: a Modelling Perspective will take place from February 27th to March 3rd 2023 at the premises of the Technical University of Berlin.

The 5-day event will focus on the design and scalable production of a new III-Sb patented memory device (ULTRARAM TM). There will be a combination of specialised lectures by international experts, and hands-on tutorials/lab sessions as well as live demonstrations of the latest TCAD/EDA tools organised by the Technical University of Berlin.

The event will provide with an excellent opportunity for networking with leaders in the field.

List of Confirmed Speakers Invited Speakers and Hands - on Session:

• Prof. Dr. Manus Hayne, Lancaster University Birth of the ULTRARAM TM Concept
• Prof. Dr. Dieter Bimberg, Technische Universität Berlin Quantum Dot-Based Flash Memories: The Holy Grail at Sunrise?
• Dr. Petr Klenovský, Masaryk University, Brno Modeling Electronic states of IlI-Sb guantum systems on GaP substrate
• Dr. Wladek Grabinski, MOS-AK (EU) FOSS TCAD/EDA Tools for Compact Modeling
• Prof. Vihar Georgiev, James Watt School of Engineering, Glasgow Nano-electronic Simulation Software (NESS): a flexible nano-device simulation platform
• PD Dr. Uwe Bandelow, WIAS Berlin TBA
• Prof. Claudia Dr.axl, Humboldt Universität Berlin Unsupervised learning for insight into high-throughput calculations
• Rabea Pons, Comsol, Göttingen Introduction into COMSOL and hands-on session
• Prof. Dr. Mathieu Luisier, ETH Zürich TBA
• Dr. Marc Bescond, Faculté des Sciences de Saint Jérôme, NQS group, Marseille TBA
• Dr. Chetan Gupta, Micron Technology (R&D) Industry perspective on memory technologies
• Prof. Dr. Jannik Wolters, Deutschen Zentrum für Luft- und Raumfahrt / TU Berlin Quantum Memories and Introduction into Quantum Technologie

More information 

Handbook of Semiconductor Devices

Massimo Rudan, Rossella Brunetti, Susanna Reggiani (Eds.)

Springer Handbook of Semiconductor Devices

Series: Springer Handbooks

1st ed., 2022, ca. 1700 p., 1300 illus.

Order online at link.springer.com or customerservice@springernature.com

• Covers physical backgrounds, fabrication, application and modeling
• Describes in detail both conventional and innovative devices
• An indispensable resource for practitioners, professionals and researchers

This Springer Handbook comprehensively covers the topic of semiconductor devices, embracing all aspects from theoretical background to fabrication, modeling, and applications.

Nearly 100 leading scientists from industry and academia were selected to write the handbook's chapters, which were conceived for professionals and practitioners, material scientists, physicists and electrical engineers working at universities, industrial R&D, and manufacturers.

Starting from the description of the relevant technological aspects and fabrication steps, the handbook proceeds with section fully devoted to the main conventional semiconductor devices like, e.g., bipolar transistors and MOS capacitors and transistors, used in the production of the standard integrated circuits, and the corresponding physical models. In the subsequent chapters, the scaling issues of the semiconductor-device technology are addressed, followed by the description of novel concept-based semiconductor devices. The last section illustrates the numerical simulation methods ranging from the fabrication processes to the device performances.

Each chapter is self-contained, and refers to related topics treated in other chapters when necessary, so that the reader interested in. specific subject can easily identify personal reading path through the vast contents of the handbook.

Technological aspects

CMOS Manufacturing processes. Semiconductor memory technologies. BCD process technologies. Measuring techniques for the semiconductor's parameters. Interconnect Processing: Integration, Dielectrics, Metals. Wet Chemical Processes for BEOL Technology. From FinFET to nanosheets and beyond. Advanced Lithography. Advanced technologies for future materials and devices

Basic devices and applications

MOS Capacitors, MOS Transistors and Charge-Transfer Devices. Electrostatic doping and devices. Planar MOSFETs and their application to IC design. Silicon power devices. Silicon Carbide Power Devices. GaN- based lateral and vertical devices. Bipolar transistors and silicon diodes. Memory Challenges. Silicon sensors. Solar Cells. X-ray detectors. Photodetectors based on Emerging Materials. Terahertz Electronic Devices. Semiconductor Lasers

New-generation devices and architectures

Heterojunction tunnel field-effect transistors. Carbon based field-effect transistors. Negative capacitors and applications. Flexible Electronics and Biomedical Sensors. Bio-Degradable Electronics. Resistive Switch- ing Memories. Phase-Change Memories. Spin-Based Devices for Digital Applications. Memristive/CMOS devices for neuromorphic applications. Nanoelectronic Systems for quantum computing

Modeling

Compact/SPICE Modeling. Process simulation. A digital twin for MEMS and NEMS. Macroscopic Transport Models for Classical Device Simulation. Grid generation and Algebraic solvers. Spherical Harmonics Expansion and Multi-Scale Modeling. Charge Transport Models for Amorphous Chalcogenides. Application of the k.p method to device simulation. Ab initio methods for electronic transport in semiconductors and nanostructures. Quantum Transport in the Phase Space, the Wigner Equation. The Non-Equilibrium Green Function (NEGF) Method. Tight-Binding Models, their Applications to Device Modeling and Deployment to. Global Community

[paper] Special Topic on Materials and Devices for 5G Electronics

Nathan D. Orloff¹, Rick Ubic², and Michael Lanagan³

Special topic on materials and devices for 5G electronics

Appl. Phys. Lett. 120, 060402 (2022); 

DOI: 10.1063/5.0079175

1 NIST, Colorado, USA
2 Boise State University, Idaho, USA
3 Penn State University, Pennsylvania, USA

Abstract: Next generation communications are inspiring entirely new applications in education, healthcare, and transportation. These applications are only possible because of improvements in latency, data rates, and connectivity in the latest generation. Behind these improvements are new materials and devices that operate at much higher frequencies than ever before, a trend that is likely to continue. Beyond these exciting applications, higher frequency millimeter waves (mmWaves) may also address a growing problem with capacity. Today, most capacity problems occur when large numbers of wireless connections or applications access the network at the same time at any single location. As wireless internet connections far surpass wired connections and wireless data usage has grown exponentially for more than 10 years,3 many believe that capacity problems will spread without access to new bandwidth.

FIG: A plot of the peak data rates vs the operating frequency 

where the diameter of the circle is the bandwidth.

Acknowledgement: Our [the editors] special thanks to Lesley Cohen, Editor-in-Chief, Susan Trolier-McKinstry, Associate Editor, and Jessica Trudeau and Emma Nicholson Van Burns for their technical assistance with publishing.

Program 2021: Symposium on Schottky Barrier MOS Devices

The symposium goal is to combine the activities of an enthusiastic group of Schottky barrier researchers worldwide. The topics cover all important aspects of potential applications, simulation and modeling, processing and implementation for CMOS/SOI technologies, Quantum technologies and approaches for neuromorphic applications. The content will be beneficial for anyone who needs to learn the opportunities and challenges of this technology since the first introduction by Walter Schottky in the 1938s. New aspects and future proposals to make the Schottky barrier into the main stream are welcome.

Program 2021

Wed 30.06.2021 (Virtual)

13:00-13:05	Opening IEEE DL
13:05-14:00	IEEE Distinguished Lecture: Tunneling Graphene FET Gana Nath Dash, Sambalpur University (IN) Abstract: During the last few decades, aggressive scaling in Si MOSFET (Metal Oxide Semiconductor Field Effect Transistor) architecture has given rise to several short channel effects, which in turn has set a performance limit on the device owing to constraint in Si technology. The emergence of graphene at this juncture with a host of exotic and favorable electronic properties, generated new hopes for the FET industry. While the graphene based analogue FET witnessed some advantages, the digital counterpart showed a dismal performance, primarily due to the zero bandgap of graphene (poor ON/OFF ratio). For a way out, an alternative architecture based on the quantum tunneling process is augmented with the graphene FET resulting in the new device named TGFET.
14:00-14:05	Opening SSBMOS
14:05-14:35	Germanium nanosheet and nanowire transistor technologies for beyond CMOS applications Walter M. Weber, Raphael Böckle, Lukas Wind, Kilian Eysin, Daniele Nazzari, Tatli Ezgi, Oliver Solfronk, Alois Lugstein and Masiar Sistani, Institute of Solid State Electronics, TU Vienna (A) Abstract: The ultimate downscaling limits of conventional field effect transistors calls for alternative computational methods that provide perspectives towards the enhancement of computational complexity, circuit performance and energy efficiency. In this sense germanium nano-transistors offer both an approachable access to quantum confinement effects and promising electronic transport properties that distinctly are compatible with modern CMOS fabrication flows. We will discuss the applicability of different germanium active regions and gating architectures towards the realization of computational electronics with added functionality. On top of exploring different realizations of reconfigurable transistors with programmable polarity we will discuss further functionality enhancement by enabling operability within the negative differential resistance regime at room temperature. Prospective implications at the circuit level will be discussed.
14:40-15:10	Evolving contact-controlled thin-film transistors Radu Sporea, University of Surrey (UK) Abstract: TFT designs that comprise multiple gates and rectifying source contacts can be designed to produce linear transconductance and act as robust amplifiers and signal converters. This talk outlines device design and opportunities in emerging edge processing applications.
15:10-15:50	COFFEE BREAK
15:50-16:20	Compact Modelling of Dually-Gated Reconfigurable Field-Effect Transistors Christian Römer*, Ghader Darbandy*, Mike Schwarz*, Jens Trommer**, André Heinzig**, Thomas Mikolajick**, Walter M. Weber***, Benjamín Iñíguez**** and Alexander Kloes* *NanoP, THM (DE), **namLAB, TU Dresden (DE), ***TU Vienna (A), ****DEEEA, URV (ES) Abstract: This work presents a closed-form and physics-based DC compact model, which is applicable on dually-gated reconfigurable field-effect transistors (RFETs). The presented compact model is focused on the charge-carrier injection at the device’s source and drain side Schottky barriers, which can be separated into field emission and thermionic emission current contributions. This work explains the basic equations which are used to calculate the current contributions and shows calculated device characteristics compared to measurements.
16:25-16:55	The Schottky barrier transistor in all its forms Laurie Calvet*, John P. Snyder**, Mike Schwarz*** *C2N, University Paris (FR),** JCap, LLC (USA), ***NanoP, THM (DE) Abstract: The Schottky barrier (SB) transistor, where the source and drain of a conventional planar MOSFET are replaced with metallic contacts, was first explored in the 1960s. Since then, many variations on this structure have been explored in the literature including: different semiconductors materials such as other non-organic semiconductors and nano-structures such as carbon nanotubes and nanowires. In this talk we review some of the changes in the electronic transport that are observed as the geometry and materials of the SB transistors are changed.

[Workshop] The Future of Nanoelectronics Devices and Systems Beyond Moore

“The Future of Nanoelectronics Devices and Systems Beyond Moore” 

Workshop on August 31, 2021

This one-day Workshop, supported; IEEE, will be devoted to the update of the European contribution to the IRDS Roadmap in the field of More than Moore, Beyond CMOS and Emerging Materials. The main challenges, most promising technologies, needed research efforts and possible applications will be presented in the following sessions; renown EU experts:

• Beyond CMOS and Emerging Materials
• Trends in Beyond CMOS
  Clivia Sotomayor-Torres; ICN2 and Jouni Ahopelto; VTT
• 2D semi-metal to semiconductor transition devices and/or doping of 2D materials
  Farzan Gity; Tyndall
• GeSn/Ge vertical nanowire GAA FETs
  Qing-Tai Zhao; FZJ
• Flexible electronics with 2D materials
  Zhenxing Wang; AMO
• Presentation of the new IRDS More than Moore Roadmap
  Mart Graef; TU Delft
• Energy Harvesting for Autonomous Systems
• Summary of the IRDS Energy Harvesting for Autonomous Systems White Paper
  Gustavo Ardila; UGA
• Energy sustainability problems of IoT networks
  Thomas Skotnicki; CEZAMAT
• Contribution of triboelectricity for kinetic energy harvesting using electrostatic transduction
  Philippe BASSET; ESIEE, Paris
• Smart Sensors
• Summary of the IRDS Smart Sensors White Paper
  Alan O’Riordan; Tyndall
• Sensing at the Edge: Challenges and Opportunities
  Adrian Ionescu; EPFL
• Smart Sensors and Systems for environment and human exposure monitoring
  Carmen Moldovan; IMT
• Smart Energy
• Summary of the IRDS Smart Energy White Paper
  Mikael Ostling; KTH
• Smart power devices based Wide Bandgap semiconductors
  William Vandendaele; CEA LETI
• Materials and substrates for future power devices
  Joff Derluyn; Soitec BU EpiGaN
• Flexible/Wearable Electronics
• Roadmap of Flexible Electronics: Challenges and Possible Solutions; Summary of the IRDS White Paper
  Benjamin Iñiguez; URV
• Schottky barrier and organic devices for neuromorphic circuits
  Laurie Calvet; CNRS; Université Paris Saclay
• New strategies for sustainable electronics
  Elvira Fortunato; UNL

Program: will be available soon

Location information

Registration: free of charge but mandatory; More information: 

contact@sinano.eu and https://eurosoiulis2021.sciencesconf.org/

[symposium] ISDCS 2021 Hiroshima University

ISDCS 2021

3-5, March 2021

Hiroshima University, Higashi-Hiroshima, Japan

The ISDCS is a premium international forum for scholars, scientists, educators, students and engineers to exchange their latest findings and technological advances in the field of devices, circuits and systems.

Keynote Speakers

• Prof. Parthasarathi Chakrabarti, Director, IIEST Shibpur and Department of Electronics Engineering, IIT(BHU), India
  "Advanced Materials and Methods for Fabrication of Thin-film Transistor (TFT)-based Sensors"
• Prof. Shinji Kaneko, Hiroshima University, Japan
  "SDGs Initiatives at Hiroshima University: Integrating Global Strategy and Regional Vitalization"

Invited Speakers

• Prof. Sanatan Chattopadhyay, University of Calcutta, India
  "Voltage Assisted Quantum Dot Based MOS Devices for Electronic and Optoelectronic Applications"
• Prof. Partha Bhattacharya, IIEST Shibpur, India
  "Performance Improvement of Graphene Derivative based Gas sensors: Role of Functional Group Tuning and Ternary Junction Formation"
• Prof. Hafizur Rahaman, IIEST Shibpur, India
  "Tunnel Field Effect Transistors: Challenges and Opportunities"
• Prof. Nillohit Mukherjee, IIEST Shibpur, India
  "Metal Oxide Semiconductors with Carbon Nanomaterials for Efficient Supercapacitive Type Energy Storage Devices"
• Prof. Shigeyasu Uno, Ritsumeikan University, Japan
  "Electrochemical Impedance Sensor for Non-invasive Living Cell Monitoring toward CMOS Cell Culture Monitoring Platform"
• Mr. Shigeru Shiratake, Corporate Vice President, DRAM, Emerging Memory Process Integration and Device Technology Micron Technology, Inc., USA
  "Challenges for DRAM scaling and performance enhancement"
• Prof. Rihito Kuroda, Tohoku University, Japan
  TBD

Previous Conference:

• ISDCS 2020, Kolkata, India
• ISDCS 2019, Higashi-hiroshima, Japan
• ISDCS 2018, Kolkata, India

Virtual Si Museum /2103/ Electron Devices Scaling

Other look at the electron device scaling: Trinitron CRT vs iPhone6 Retina HD LED display. Both were extracted for broken units:) Trinitron CRT (Sony's brand name for its line of aperture-grille-based CRTs) were introduced in 1968. Its standard TV resolution was 720x576-pixel for PAL. iPhone6 available since 2014 has the HD LED display 1334x750-pixel. Just estimate volume, resolution and power consumption scaling in both cases.

REF:

• Sony Trinitron A13JZVOOX
  5-inch (diagonal) CRT 720x576-pixel resolution for PAL at 192 ppi
• iPhone6 Retina HD display
  4.7-inch (diagonal) LED 1334x750-pixel resolution at 326 ppi