Showing posts with label CMOS integrated circuit. Show all posts
Showing posts with label CMOS integrated circuit. Show all posts

Apr 7, 2021

[paper] Compact Modeling as a Bridge between Technologies and ICs


Compact Modeling as a Bridge 
between Scaled Semiconductor Technologies and Advanced Designs of the Integrated Circuits
AB Bhattacharyya and Wladek Grabinski
IETE Journal of Research 58(3):179-180 (May 2012)
DOI: 10.4103/0377-2063.97322

Abstract: The quality of the integrated circuits analysis, required in present contemporary design flows, is directly linked to the accuracy of its basic components—the Compact Model/Simulation Program with Integrated Circuit Emphasis (SPICE) Model. The compact/SPICE modeling is an essential research activity bridging scaled semiconductor technologies and advanced designs of the integrated circuits. To enable complete access to the new advanced semiconductor technologies, the designers have to frequently update their Computer-Aided Design (CAD) tools with accurate definition of the semiconductor device models that can be implemented into the CAD circuit simulators. The models must preferably be physics-based to account for complex dependencies of the device properties and defined in standard, high-level language, i.e., Verilog-A, to simplify access and implementation into the CAD tools. For the state of the art advanced CMOS technologies (analog, HV, SOI), both modeling and characterization are challenging tasks that will be emphasized in this special issue of Compact Modeling. (REF) Compact Modeling as a Bridge between Scaled Semiconductor Technologies and Advanced Designs of the Integrated Circuits. 

Available from: <http://www.mos-ak.org/india/>
and https://www.researchgate.net/publication/278384752_Compact_Modeling_as_a_Bridge_between_Scaled_Semiconductor_Technologies_and_Advanced_Designs_of_the_Integrated_Circuits

Jun 30, 2015

Analog CMOS from 5 micrometer to 5 nanometer

 Sansen, W., "1.3 Analog CMOS from 5 micrometer to 5 nanometer," ISSCC 2015 IEEE International , vol., no., pp.1,6, 22-26 Feb. 2015 doi: 10.1109/ISSCC.2015.7062848 
Abstract: In our future, as usual, analog designers will continue to expand their expertise and knowledge in response to changing needs. While devices will change their nature and operate at higher and higher frequencies, their I-V characteristics will remain similar. In the near term, increased speed of MOS circuits, will be reached by operating deeper in weak inversion. Offset and 1/f noise will continue to play a critical role. Thus, in general, it seems that analog expertise is insensitive to technology change.
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