Showing posts with label PDK. Show all posts
Showing posts with label PDK. Show all posts

May 6, 2024

[Latch-Up] IHP Open Source PDK

Frank Vater, IHP Frankfurt (Oder), Germany

Abstract: Main focus of this talk is the SG13G2 Open Source PDK for IHP 130nm BiCMOS technology. The current state of our activities will be given for the analogue as well as for the digital PDK including design flow with open source tools. Some more details on first experiences for schematic driven design, simulation, layout, DRC and LVS will be pointed out. Furthermore, already known challenges analogue and digital design flow and open issues on open source tool chain will be addressed. The talk will be closed with a road map for future work.

Latch-Up: a weekend of presentations and networking for the open source silicon community, much like its European sister conference ORConf.

Produced by NDV: @nextdayvideo
OpenHardware Sat Apr 20 16:20:00 2024 at b45r230

May 1, 2024

[CNM25] Academic Process Design Kit


The aim of this academic process design kit (APDK) is to introduce circuit designers to the top-down design methodology of mixed-signal full-custom integrated circuits (ICs) in CMOS technologies. For this purpose, the following freely available electronic design automation (EDA) tools are proposed for both the schematic and the physical IC design. The APDK incorporates all the required technological information for the simple 2.5um 1P2M PiP CMOS technology (CNM25) from IMB-CNM(CSIC). Anyway, this APDK can be easily customized to extend its coverage to more complex CMOS technologies.

News 2024.04.09:
APDK release version 2024_04_09
+ Update to Glade 6.x series (Qt6)
+ Screenshots



REF: Poster at IEEE ISCAS 2017 in Baltimore, MD, USA.

CONTACT: 
tel: +34 93 594 77 00
fax: +34 93 580 02 67
IMB-CNM (CSIC)
Campus UAB Bellaterra
08193 Cerdanyola del Vallès, SPAIN

 



Jan 5, 2024

ISHI-kai January 2024 event

2024年1月イベント「オープンソースPDK団体」勉強会国内外のオ
ープンソースPDKやEDAの状況について、キーマンに語っていただきます
With the recent rise in the semiconductor industry, the movement of open source PDK and EDA in Japan and overseas has become active. Therefore, in this study session, key people will talk about the status of open source PDK and EDA in Japan and overseas.

Schedule
Friday, January 26, 2024, 18:00-21:00 (Reception: 18:30)

Venue (onsite)
Google Shibuya Office
3-21-3 Shibuya, Shibuya-ku, Tokyo
Shibuya Stream Google reception meeting

Online Broadcast: 
Google Meet: https://meet.google.com/ksa-tjaw-ges

Participation Fee
free
Timetable
TimeSpeakerTitleLecture Outline
Until 18:30ISHI-kaireceptionThe entrance to the facility closes at this time, so if you are participating locally, please come by this time as much as possible.
18:00 ~ 18:30ISHI-kaiChat time-
18:30 ~ 19:15 (Lecture: 30min, Q&A: 15min)Takeshi Hamamoto
Minimal Fab Propulsion Organization Device Engineer 
minimal Fab open PDK1) What is a minimal fab
2) openPDK
3) Design Contest at Semicon 2023

19:15 ~ 20:00 (Lecture: 30min., Q&A: 15min.)Junichi Okamura
IEEE Senior Member 
OpenPDK and the World-
20:00 ~ 20:45 (Lecture: 30min., Q&A: 15min.)@noritsunaAbout the upcoming open source PDK shuttle(To be released at a later date)
21:00ISHI-kaiclosing

What is ISHI-kai?
The association was named ISHI-kai (Inter-linked Society on Homemade IC Kai). The name was conceived from the Society Community (Association) that handles open (democratized) ISHI = stone = Silicon = semiconductors (ASIC/LSI/IC) and connects various fields.

OpenMPW (Open Multi Project Wafer), which appeared as a forerunner, is a shuttle program created by Google investing in Efabless, and includes the tools necessary for making semiconductors (ASIC/LSI/IC) (EDA/PDK) to ISHI manufacturing in IC fabs). This is exactly the "openness of semiconductors (ASIC/LSI/IC) and EDA/PDK" of the open source movement (democratization of software) that started with GNU!

Therefore, this association was established as a user society community (association) that focuses not only on experts in semiconductors (ASIC/LSI/IC) in the past, but also on those who see the potential of the open source movement of semiconductors (ASIC/LSI/IC) in the future and those who want to create new semiconductors (ASIC/LSI/IC).

We/ISHI-kai will continue to work toward a world where semiconductors (ASIC/LSI/IC) and EDA/PDK can be used by everyone, just as OSs, compilers, libraries, apps, electronic boards, 3D CAD and 3D printers that we/ISHI-kaire only available to experts can now be used by everyone as open source software, open hardware, open modeling, etc.

As for the future activity plan, we/ISHI-kai have a policy of revolutionizing the semiconductor (ASIC/LSI/IC) field by involving people from other fields, and we/ISHI-kai will hold events such as hands-on seminars for ultra-beginners for other fields and in-depth study sessions for experts, form a team to challenge the OpenMPW shuttle and Chipathon from around the world, and Maker we/ISHI-kai would like to participate in events such as Faire, so thank you.

Precautions
As events move online, we/ISHI-kai ask participants to act in accordance with the spirit of the Code of Conduct. If you have any problems, please contact the organizer. If it is judged that there is no improvement in the request even if there is no abuse such as vandalism or malicious intent, we/ISHI-kai may respond on a case-by-case basis. 
https://www.contributor-covenant.org/ja/version/2/0/code_of_conduct/

Acknowledgements
Thanks to the kindness of Google for providing a real/onsite venue.

Nov 3, 2023

The first IC designed in B&H has been fabricated

On 18 May 2023, the Faculty of Electrical Engineering of the University of Banja Luka, Bosnia and Herzegovina, presented the first integrated chip of semiconductor technology, which represents the most sophisticated technological process.

FIG: IC oscillates as per design specification and pre/post-layout simulation

Faculty of Electrical Engineering has become one of the higher education institutions where one of the most important engineering disciplines of today and the future is studied according to the best world programmes, with the direct application of industrial standards in teaching, thus preparing the next generation of engineers to be the flywheel of economic revival through innovation.
It took students and professors at the Faculty of Electrical Engineering five years to develop the first integrated chip. Student Vanja Žerić is one of the innovators of this idea, and he states that the knowledge gained was a prerequisite to start the production.
"We are talking about two chips, one of which is a stabilizer or a voltage regulator that has the ability to stabilize the voltage from 1.8 to 3.3 volts. The second was an oscillator that is essential for a chip like this.'', Vanja said.
Assistant Professor of the Faculty of Electrical Engineering, Aleksandar Pajkanović, PhD, who teaches several courses in the field of chip development at the Department of Electronics, pointed out that the CMOS technological process is the most sophisticated technology that exists in the world, and that it is commercially available, and that they have mastered it and demonstrated it through the implementation of the chip.
"It is particularly important to point out that this technology is significant as a military and industrial strategic resource as well as in higher education, and the most important thing is that we are now among world universities that study this field. It is usual for the implementation of chips to be done in doctoral studies, but with great efforts we managed to do it with third-year students. This chip is not intended for commercialization, as we developed it to demonstrate the capability and mastery of such advanced technology." Prof. Pajkanović stressed.

The details of that development are in the following references:

[1] A. Pajkanovic, “On the Application of Free CAD Software to Electronic Circuit Curricula”, 3rd IcETRAN2016, Zlatibor, Serbia, 2016
[2] A. Pajkanovic and Z. Ivanovic, “A Report on Recent Development in Application of Free CAD Software to IC Curricula,” 5th IcETRAN2018, Palic, Serbia, 2018.
[3] A. Pajkanovic, “Introducing Chisel to IC Design Curriculum at the Faculty of Electrical Engineering in Banja Luka”, 8th RISCV Workshop, Barcelona, Spain, 2018
[4] A. Pajkanovic, “CMOS IC Design from Schematic Level to Silicon within IC Curricula Using Free CAD Software”, INDEL2020, Banja Luka, B&H, 2020.
[5] A. Pajkanovic, “Free/Open Source EDA Tools Application in Digital IC Design Curricula”, 8th IcETRAN2021, Stanisici, B&H, 2021.
[7] A. Pajkanovic, "Free IC Design in Education", PSSOH 2021

[read more...]



 

Jun 9, 2023

[Workshop] Open Source PDKs and EDA


RIHGA Royal Hotel Kyoto, Horikawa Shiokoji, Shimogyo ku, Kyoto 600 8237, Japan.
Date & Time: 5:30pm.-7:15pm on June 11 (Sun), 2023

Since its launch in 2020, the Open MPW shuttle program has received over 500 project submissions spanning 9 shuttles. This workshop will explore various topics related to designers' experiences, including measured results, foundry perspectives, and governmental expectations.

Organizers: 
  • Makoto Ikeda (The University of Tokyo)
  • Mehdi Saligane (University of Michigan)
Program:
  1. Design experience: “The Journey of Two Novice LSI Enthusiasts: Tape-Out of CPU+RAM in Just One Month”, Kazuhide Uchiyama, University of Electro-Communications and Yuki Azuma, University of Tsukuba
  2. From Zero to 1000 Open Source Custom Designs in Two Years, Mohamed Kassem, Co-founder and CTO, Efabless
  3. The SKY130 Open Source PDK: Building an Open Source Innovation Ecosystem, Steve Kosier, Skywater technology
  4. Open Source Chip Design on GF180MCU – A foundry perspective, Karthik Chandrasekaran, Global Foundries
  5. Japan Foundries' Perspectives on Silicon design democratization, Shiro Hara, Minimal Fab & AIST
  6. Google's perspective on Open source PDKs, Open source EDA tools, and OpenMPW shuttle program, Johan Euphrosine and Tim Ansell, Google
  7. The Nanofabrication Accelerator Project, Matthew Daniels, NIST
  8. Japanese government perspective on Silicon design democratization, Yohei Ogino, The Ministry of Economy, Trade and Industry METI
VLSI Symposium Workshop1 "Open Source PDKs and EDA" Audience