[release] IHP Open ADK

IHP Open Assembly Design Kit 

(#OpenAKD)

https://github.com/IHP-GmbH/IHP-Open-ADK

is preview ready and officially available on the IHP GitHub. This release comes with several tools to enable the workflow, including the IHP open source interposer technology process (OpenIntM4TM2). It is Assembly-level Design Kit (OpenADK) for heterogeneous chiplet integration. The OpenADK operates one abstraction layer above all process‑specific PDKs, providing the rule set and assembly tooling that define chiplet placement, routing, and interposer‑level connectivity. The interposer and the chiplet dies remain ordinary PDKs.

Status Warning ADK is currently a preview release only! v0.2.0. The KLayout assembly DRC, its runner, the KiCad DRU generator, and the IHP interposer adapter are implemented and exercised by the regression suite.

● Current ADK documentation

https://ihp-open-adk-docs.readthedocs.io/en/latest/index.html

● Quick start ADK commands

https://ihp-open-adk-docs.readthedocs.io/en/latest/quickstart.html

FOSSEE eSim Marathon – Circuit Design & Simulation with IHP SG13G2

Design, Simulate, Showcase

Unlock Open-Source VLSI Design  using eSim + IHP SG13G2 OpenPDK!!!

The eSim Marathon - Circuit Design & Simulation with IHP SG13G2 is a nationwide circuit design competition where participants use eSim, an open-source EDA tool developed by FOSSEE, IIT Bombay, to design and simulate circuits using the IHP OpenPDK for 130nm SG13G2 BiCMOS technology from IHP Microelectronics, Germany.

Key Highlights:

• Tool Used: eSim - a free and open-source alternative to commercial circuit design tools 
• OpenPDK Used: IHP SG13G2 - enables design of analog, digital, and RF circuits at 130 nm BiCMOS.
• Objective: Design, simulate, and submit functional analog/digital/mixed-signal circuits.
• Eligibility: Open to individuals - students, hobbyists, and early-career professionals.
• Learning Outcomes: Participants gain hands-on VLSI design experience using a real foundry OpenPDK, develop schematics, run simulations, and build documentation - entirely with open tools.

Register < https://esim-marathon.netlify.app/register/ >

Timeline

Date	Activity	Description
1 Sept. - 15 Sept. 2025	Registration for the Marathon	Complete the participation form
16 Sept. 2025	Marathon Inauguration Webinar	FOSSEE Team will introduce through eSim, IHP and Marathon process
16 Sept. - 23 Sept. 2025	Literature Survey	Participants need to research the topic available in papers/journals on the web
23 Sept. 2025	Report Submission	Submit one-page research conclusion and circuit implementation plan
23 Sept. - 5 Oct. 2025	Implementation	Design, characterise and simulate using eSim platform
5 Oct. - 8 Oct. 2025	Report Submission & Documentation	Upload reference and actual circuit/waveform using eSim
25 Oct. 2025	Result Declaration (Provisional)	Announcement of provisional results

[paper] anybody can design and build a chip

Krzysztof Herman, Norbert Herfurth, Tim Henkes, Sergei Andreev, Rene Scholz, Markus Müller, Mario Krattenmacher, Harald Pretl, and Wladyslaw Grabinski

On the Versatility of the IHP BiCMOS Open Source and Manufacturable PDK: 

A step towards the future where anybody can design and build a chip

IEEE Solid-State Circuits Magazine, vol. 16, no. 2, pp. 30-38, Spring 2024

DOI: 10.1109/MSSC.2024.3372907

Abstract: In this article, we introduce the first European open source process design kit (PDK), namely IHP-Open130-G2. We provide a concise history of the PDK itself and offer a brief comparison with some alternative open source PDKs, such as SKY130 and GF180MCU. The article also includes a process description and details on deliverables, offering insights into available devices, models, supported open source tools, and workflows. As the IHP-Open130-G2 is currently under development, we present key points outlining future activities. This aims to inform and attract users to join the open source silicon community. The concluding section of the article compares measurement results for active devices with compact model results. The article concludes with a cryptographic Internet protocol (IP) core based on IHP-Open130-G2 as an exemplary use case.

FIG: Silicon Proven Application: The final layout of the HEP custom cryptographic IP core.

[REF] “130nm BiCMOS open source PDK, dedicated for analog, mixed signal and RF design.” GitHub. Online: https://github.com/IHP-GmbH/IHP-Open-PDK

[Latch-Up] IHP Open Source PDK

IHP Open Source PDK:

Announcement, Setup, Current State and Experiences, and look ahead

Frank Vater, IHP Frankfurt (Oder), Germany

Latch-Up 2024 video

Abstract: Main focus of this talk is the SG13G2 Open Source PDK for IHP 130nm BiCMOS technology. The current state of our activities will be given for the analogue as well as for the digital PDK including design flow with open source tools. Some more details on first experiences for schematic driven design, simulation, layout, DRC and LVS will be pointed out. Furthermore, already known challenges analogue and digital design flow and open issues on open source tool chain will be addressed. The talk will be closed with a road map for future work.

Latch-Up: a weekend of presentations and networking for the open source silicon community, much like its European sister conference ORConf.

Produced by NDV: @nextdayvideo
OpenHardware Sat Apr 20 16:20:00 2024 at b45r230

[open position] IHP Research Associate for Open PDK Development

Research Associate for Open PDK Development (m/f/d)

Developer for Open Source Process Design Kits

for SiGe-BiCMOS Technology

Job-ID: 7011/23 | Department: Technology | Salary: as per tariff TV-L | Working time: 40h/week (part-time work option) | Limitation: initially 2 years with option of extension for three more years | Entry Date: as soon as possible

IHP is an institute of the Leibniz Association and conducts research and development of silicon-based systems and ultra-high-frequency circuits and technologies, including new materials. It develops innovative solutions for application areas such as wireless and broadband communication, security, medical technology, industry 4.0, automotive industry, and aerospace. IHP employs approximately 350 people. It operates a pilot line for technological developments and the preparation of high-speed circuits with 0.13/0.25 µm-SiGe-BiCMOS technologies, located in a 1500 m² cleanroom that meets the highest industrial nanotechnology requirements.

The position:

As a member of the group Research & Prototyping Service, you will develop Process Design Kit for IHP’s BiCMOS technologies and new future technology modules with special focus on open source PDK development. Your detailed tasks will include programming of pCells and their integration into our verification process. Devices descriptions, user guides and test cases are important aspects of your work, too. Finally, managing our PDK repositories on Github with external contributions and adaption of existing tools like OpenRAM is part of the work. Implementation of new devices and investigations of new design tools and flows will give this position room for interesting development opportunities.

Your profile:

You hold a Master's degree in computer science with background in semiconductors, physics or electrical engineering. Knowledge in semiconductor devices and programming are of advantage. Your specialized knowledge preferably covers ASIC design environment like Cadence Virtuoso, Mentor/Siemens Tanner or KeySight ADS, OpenROAD/OpenLane, Linux and scripting languages (e.g. Python, Perl or TCL). You are well organized and always keep the overview even with many parallel projects. Thanks to your skillful communication, you are a binding and reliable contact person for our partners. You are also a strong team player, and you confidently handle the German and English language. You are also a strong team player. We are looking for a team member, who is able to structure his or her own work and to bring a well-organized and systematic way of working into the cooperation with creative minds. You are an ideal match for this position, when you have experimental, analytical and problem-solving skills, very strong communicative skills and the ability to quickly learn how to operate the latest technical equipment including various software. It is necessary that you confidently handle the English language. Knowledge of the German language is welcome. The consolidating of German language skills is expected and highly encouraged, for example in in-house language courses and intensive courses.

Your application:
Have we sparked your interest? Then we look forward to receiving your application via our online application form. For further information regarding the position, please contact Dr. René Scholz