[paper] TMD FETs

Ahmed Mounir^a, Benjamin Iñiguez^a, François Lime^a, Alexander Kloes^b

Theresia Knobloch^c, Tibor Grasser^c

Compact I-V model for back-gated and double-gated TMD FETs

Solid-State Electronics (2023): 108702

DOI: 10.1016/j.sse.2023.108702

a Rovira I Virgili University, Tarragona, Spain
b University of Applied Sciences, Giessen, Germany
c TU Wien, Vienna, Austria

Abstract: A physics-based analytical DC compact model for double and single gate TMD FETs is presented. The model is developed by calculating the charge density inside the 2D layer which is expressed in terms of the Lambert W function that recently has become the standard in SPICE simulators. The current is then calculated in terms of the charge densities at the drain and source ends of the channel. We validate our model against measurement data for different device structures. A superlinear current increase above certain gate voltage has been observed in some MoS2 FET devices, where we present a new mobility model to account for the observed phenomena. Despite the simplicity of the model, it shows very good agreement with the experimental data.

Fig : 2D schematic structure for 2D TMD FETs: (a) a double gated monolayer MoS2 FET. 

(b) a double gated monolayer WSe2 FET. (c)  single back-gated multilayer MoS2 FET. 

(d) single back-gated monolayer FET.

[paper] Bionic Neural Probe

Yu Zhou, Huiran Yang, Xueying Wang, Heng Yang, Ke Sun, Zhitao Zhou, Liuyang Sun, Jianlong Zhao, Tiger H. Tao and Xiaoling Wei

A mosquito mouthpart-like bionic neural probe

Microsystems & Nanoengineering volume 9, Article number: 88 (2023)

DOI: 10.1038/s41378-023-00565-5

Abstract: Organic electronics can be biocompatible and conformable, enhancing the ability to interface with tissue. However, the limitations of speed and integration have, thus far, necessitated reliance on silicon-based technologies for advanced processing, data transmission and device powering. Here we create a stand-alone, conformable, fully organic bioelectronic device capable of realizing these functions. This device, vertical internal ion-gated organic electrochemical transistor (vIGT), is based on a transistor architecture that incorporates a vertical channel and a miniaturized hydration access conduit to enable megahertz-signal-range operation within densely packed integrated arrays in the absence of crosstalk. These transistors demonstrated long-term stability in physiologic media, and were used to generate high-performance integrated circuits. We leveraged the high-speed and low-voltage operation of vertical internal ion-gated organic electrochemical transistors to develop alternating-current-powered conformable circuitry to acquire and wirelessly communicate signals. The resultant stand-alone device was implanted in freely moving rodents to acquire, process and transmit neurophysiologic brain signals. Such fully organic devices have the potential to expand the utility and accessibility of bioelectronics to a wide range of clinical and societal applications.

FIG: Multifunctional biomimetic neural probe system, with multichannel flexible electrode array and high sensitivity sensor array. 

[chapter] GAA Transistors

Srivastava, Shobhit, and Abhishek Acharya

Challenges and future scope of gate-all-around (GAA) transistors

in "Device Circuit Co-Design Issues in FETs"; 

Shubham Tayal et al. (Editors)

231 CRC Press, 22 Aug 2023 - Technology & Engineering

Introduction: No doubt, FinFET technology is the slogger of today's semiconductor world. But as demand for further scaling with a desire for ultra-low-power and high-speed applications results in undesired short-channel effects, a new transistor is required. This is where gate-all-around (GAA) devices come into being. The GAA structure helps to mitigate unwanted short-channel effects by enhancing channel controllability. In GAAFETS, the channel surrounds all of its sides through a high-K and interfacial oxide layer. Thanks to science and technological innovation, the GAAFET family brings together different transistors and their competitive benefits. This chapter tries to answer why and how 3D devices emerge. In addition to the limitation of FinFET (a 3D device, gate surrounded by three sides), it further talks about the scope and challenges of different competitive GAAFET members (nanowire FET, nanosheet FET, junctionless nanosheet FET, complementary PET, and forksheet FET) of the GAAFET family. It is worth mentioning that a smaller benefit of the device performance exerts a massive performance enhancement on circuit-level applications. However, the advantages of device enhancement concurrently exaggerate the limitation of devices at circuit-level applications. So, an elaborated idea of GAAFETs holding the benefits and challenges at the circuit is also discussed here.

FIG: Structural evolution of transistors from planar to 3D forksheet FET technology

[paper] Printed OTFTs

Non-Quasi-Static modeling of printed OTFTs

Antonio Valletta^1,2, Matteo Rapisarda^1,2, Mattia Scagliotti¹, Guglielmo Fortunato¹, Luigi Mariucci^1,2, Andrea Fabbri², Paolo Branchini² and Sabrina Calvi^1,2,3,4

IEEE J-EDS, 2023, Jul 7

 
1 CNR - Institute for Microelectronics and Microsystems (IMM), via del Fosso del Cavaliere, 100, 00133 Rome, Italy
2 INFN, Sezione di RomaTre, via della Vasca Navale, 00146 Rome, Italy
3 CNR-SPIN UoS di Napoli, Università degli Studi di Napoli Federico II, Dipartimento di Fisica, piazzale Tecchio, 80, 80125, Napoli, Italy
4 Department of Physics University of “Tor Vergata”, via della Ricerca Scientifica 1, 00133, Rome, Italy

Abstract: A non-quasi-static compact model well suited for the simulation of the electrical behavior of printed organic thin-film transistors (OTFTs) is proposed and validated. The model is based on the discretization of the current continuity equation by using a spline collocation approach, while the electrical transport in the organic semiconductor is described by the variable range hopping theory. The model accounts for the presence of parasitic regions that are often found in the layouts of printed OTFTs due to large process tolerances. The model has been implemented in the Verilog-A language and has been validated by a comparison with the capacitance vs. voltage (small signal) characteristics of the devices and measurements made on OTFT-based common-source amplifiers (large signal). A comparison with a quasi-static version of the model is reported. 

FIG: Typical device layout (in scale) of the printed OTFTs and its DC (static) characterization: transfer and output characteristics of an L=100µm W=400µm device measured after light exposure

Aknowledgements: This work has been funded by the Italian National Institute of Nuclear Physics – INFN -5th commission, under the “FIRE” project (2019-2022) and from INFN-CNR national project (PREMIALE 2012) EOS “Organic Electronics for Innovative research instrumentation”.

[book] 75th Anniversary of the Transistor

75th Anniversary of the Transistor 

Arokia Nathan (Editor), Samar K. Saha (Editor), Ravi M. Todi (Editor)

ISBN: 978-1-394-20244-7 August 2023 Wiley-IEEE Press 464 Pages

Description: 75th Anniversary of the Transistor is a commemorative anniversary volume to celebrate the invention of the transistor. The anniversary volume was conceived by the IEEE Electron Devices Society (EDS) to provide comprehensive yet compact coverage of the historical perspectives underlying the invention of the transistor and its subsequent evolution into a multitude of integration and manufacturing technologies and applications.

The book reflects the transistor’s development since inception to the current state of the art that continues to enable scaling to very large-scale integrated circuits of higher functionality and speed. The stages in this evolution covered are in chronological order to reflect historical developments.

Narratives and experiences are provided by a select number of venerated industry and academic leaders, and retired veterans, of the semiconductor industry. 75th Anniversary of the Transistor highlights:

• Historical perspectives of the state-of-the-art pre-solid-state-transistor world (pre-1947) leading to the invention of the transistor
• Invention of the bipolar junction transistor (BJT) and analytical formulations by Shockley (1948) and their impact on the semiconductor industry
• Large scale integration, Moore’s Law (1965) and transistor scaling (1974), and MOS/LSI, including flash memories — SRAMs, DRAMs (1963), and the Toshiba NAND flash memory (1989)
• Image sensors (1986), including charge-coupled devices, and related microsensor applications

With comprehensive yet succinct and accessible coverage of one of the cornerstones of modern technology, 75th Anniversary of the Transistor is an essential reference for engineers, researchers, and undergraduate students looking for historical perspective from leaders in the field.

TABLE OF CONTENTS

Editor Biography xiii

Preface xv

1 The First Quantum Electron Device 1

Leo Esaki

2 IEEE Electron Devices Society: A Brief History 3

Samar K. Saha

3 Did Sir J.C. Bose Anticipate the Existence of p- and n-Type Semiconductors in His Coherer/Detector Experiments? 17

Prasanta Kumar Basu

4 The Point-Contact Transistor: A Revolution Begins 29

John M. Dallesasse and Robert B. Kaufman

5 On the Shockley Diode Equation and Analytic Models for Modern Bipolar Transistors 43

T. H. Ning

6 Junction-Less Field Effect Transistors: The First Transistor to be Conceptualized 51

Mamidala Jagadesh Kumar and Shubham Sahay

7 The First MOSFET Design by J. Lilienfeld and a Long Journey to Its Implementation 65

Hiroshi Iwai

8 The Invention of the Self-Aligned Silicon Gate Process 89

Robert E. Kerwin

9 The Application of Ion Implantation to Device Fabrication: The Early Days 95

Alfred U. MacRae

10 Evolution of the MOSFET: From Microns to Nanometers 101

Yuan Taur

11 The SOI Transistor 115

Sorin Cristoloveanu

12 FinFET: The 3D Thin-Body Transistor 135

Chenming Hu

13 Historical Perspective of the Development of the FinFET and Process Architecture 145

Digh Hisamoto

14 The Origin of the Tunnel FET 155

Gehan A. J. Amaratunga

15 Floating-Gate Memory: A Prime Technology Driver of the Digital Age 163

S. M. Sze

16 Development of ETOX NOR Flash Memory 179

Stefan K. Lai

17 History of MOS Memory Evolution on DRAM and SRAM 187

Mitsumasa Koyanagi

18 Silicon-Germanium Heterojunction Bipolar Transistors: A Retrospective 215

Subramanian S. Iyer and John D. Cressler

18.9 Some Parting Words (SSI) 235

19 The 25-Year Disruptive Path of InP/GaAsSb Double Heterojunction Bipolar Transistors 239

Colombo R. Bolognesi

20 The High Electron Mobility Transistor: 40 Years of Excitement and Surprises 253

Jesús A. del Alamo

21 The Thin Film Transistor and Emergence of Large Area, Flexible Electronics and Beyond 263

Yue Kuo, Jin Jang, and Arokia Nathan

22 Imaging Inventions: Charge-Coupled Devices 273

Michael F. Tompsett

23 The Invention and Development of CMOS Image Sensors: A Camera in Every Pocket 281

Eric R. Fossum

25 Creation of the Insulated Gate Bipolar Transistor 299

B. Jayant Baliga

26 The History of Noise in Metal-Oxide-Semiconductor Field-Effect Transistors 309

Renuka P. Jindal

27 A Miraculously Reliable Transistor: A Short History 323

Muhammad Ashraful Alam and Ahmed Ehteshamul Islam

28 Technology Computer-Aided Design: A Key Component of Microelectronics' Development 337

Siegfried Selberherr and Viktor Sverdlov

29 Early Integrated Circuits 349

Willy Sansen

30 A Path to the One-Chip Mixed-Signal SoC for Digital Video Systems 355

Akira Matsuzawa

31 Historical Perspective of the Nonvolatile Memory and Emerging Computing Paradigms 369

Ming Liu

32 CMOS Enabling Quantum Computing 379

Edoardo Charbon

33 Materials and Interfaces: How They Contributed to Transistor Development 387

Bruce Gnade

34 The Magic of MOSFET Manufacturing 393

Kelin J. Kuhn

35 Materials Innovation: Key to Past and Future Transistor Scaling 403

Tsu-Jae King Liu and Lars P. Tatum

36 Germanium: Back to the Future 415

Krishna C. Saraswat

References 428

Index 431