Open PhD Position at THM

Open PhD Position

Compact Modeling of Reconfigurable Transistors

(full-time)

Payment depending on qualification up to salary group 13 TV-H

(approx. 60k€ … 65k€ per year)

The position in Prof. Dr. Alexander Kloes' Research Group Nanoelectronics/Device Modeling at Technische Hochschule Mittelhessen (THM), University of Applied Sciences, Campus Giessen, is expected to be filled from May 2024 for a duration of 3 years. It is intended to enable the successful candidate to obtain a doctorate degree in a cooperative doctorate procedure between the THM University of Applied Sciences and the Universitat Rovira i Virgili (URV, Spain).

The project in the research field of microelectronics aims at compact modelling of reconfigurable MOS transistors. The goal of the project is the development of a DC/AC Verilog-A compact model for standard design tools to be used for new circuit design concepts in the field of hardware security. Starting point is a physics-based analytical compact current model for Schottky Barrier Transistors which has already been published by the research group at THM. The task is part of a joint project with academic and industrial partners in areas from device technology to logic synthesis. Beside TCAD simulations, for verification by measurements, the project is in close collaboration with a global company for the fabrication of test structures.

Your Tasks:

• Research in the field of microelectronics and physics of semiconductor devices
• PhD project on the development of a compact model for reconfigurable MOSFETs
• Implementation in standard design tools in close collaboration with partners
• Participation in teaching and general tasks of the group is expected

Requirements for the position:

• Master’s comparable degree in Electrical Engineering or Physics
• Excellent theoretical knowledge and practical expertise in the field of solid-state electronics and physics
• Good knowledge in mathematics
• Good programming skills
• Good English language skills are necessary, basic German language skills are desirable

We offer:

• A stimulating and interdisciplinary research environment with very good infrastructure
• Flexible working hours
• Offers for the compatibility of family and career
• Attractive advanced training opportunities
• Free use of public transport within the scope of Hessian state

For further information, please contact Prof. Alexander Kloes

Details of the research group can be found at http://go.thm.de/dmrg.

[PhD] ULTRARAM™ at Lancaster University

Lancaster University, Physics Department has three open PhD Projects, Programmes & Scholarships

• Scaling ULTRARAM™ on FindAPhD.com
  The PhD project will further advance the development of ULTRARAM™ memory. ULTRARAM™ is an ultra-efficient, multi-award-winning memory technology that combines the non-volatility of flash with the speed and endurance of dynamic random access (DRAM).
• Vertical-cavity surface-emitting lasers for below-screen consumer (and other) applications at Lancaster University on FindAPhD.com
  The PhD project will further develop a patented approach to implementing vertical-cavity surface-emitting lasers (VCSELs) operating at telecoms wavelengths
• Novel compound-semiconductor logic for computing applications on FindAPhD.com
  The PhD project will further develop a patent-pending alternative approach to digital logic that abandons the CMOS paradigm underpinning computing

Supervisor: Prof. M. Hayne

Application deadline: 29 February 2024 // Competition Funded PhD Project (UK Students Only)

Junior Scientist (PhD candidate) Positions

♦ Ferroelectric Vertical Nanowire Field Effect Transistors Development
at NaMLab, Dresden (Germany) and at University of Bordeaux (France)

Contact:

Dr.-Ing. Jens Trommer, NaMLab gGmbH 

Dr. Marina Deng, University of Bordeaux 

♦ Millimetre-wave (mmWave) Device; Silicon Waveguide Technologies for future > 100 GHz Applications
at School of Engineering, UC Louvain 
Contact:

Prof. Dimitri Lederer, UC Louvain 

♦ Modeling of Single Photon Avalanche Photodiode Temporal Response
at Institut d'Optique Graduate School, Univ. Saint-Etienne and STM (Crolles)
Contact:

Prof. Raphael Clerc, Univ. Saint-Etienne

Dr. Ing. Denis Rideau, STM

[PhD Thesis] III-V MOS-HEMTs for 100-340GHz Communications Systems

UNIVERSITY OF CALIFORNIA

Santa Barbara

III-V In_xGa_1-xAs / InP MOS-HEMTs for 100-340GHz Communications Systems

A dissertation for PhD degree in Electrical and Computer Engineering

by Brian David Markman

Abstract: This work summarizes the efforts made to extend the current gain cutoff frequency of InP based FET technologies beyond 1THz. Incorporation of a metal-oxide-semiconductor field effect transistor (MOSFET) at the intrinsic Gate Insulator-Channel interface of a standard high electron mobility transistor (HEMT) has enabled increased g_m,i by increasing the gate insulator capacitance density for a given gate current leakage density. Reduction of RS,TLM from 110 Ω.μm to 75Ω.μm and Ron(0) from 160Ω.μm to 120Ω.μm was achieved by removing/thinning the wide bandgap modulation doped link regions beneath the highly doped contact layers. Process repeatability was improved by developing a gate metal first process and D_it was improved by inclusion of a post-metal H₂ anneal. In_xGa_1-xAs / InAs composite quantum wells clad with both InP and In_xAl_1-xAs were developed for high charge density and low sheet resistance to minimize source resistance. 

Figure a) InP-based HEMT b) III-V DC optimized MOSFET c) proposed InP-based MOS-HEMT

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[Citation] Markman, B. D. (2020). III-V In_xGa_1-xAs / InP MOS-HEMTs for 100-340GHz Communications Systems. UC Santa Barbara. ProQuest ID: Markman_ucsb_0035D_14853. Merritt ID: ark:/13030/m5v4681j. Retrieved from https://escholarship.org/uc/item/6st812pb

Open PhD and Post-Doc positions at BIU

Dr. Adam Teman is a tenure track Senior Lecturer at Bar-Ilan University in Ramat Gan, Israel and a leading member of the Emerging Nanoscaled Circuits and Systems (EnICS) Labs at BIU. Dr.Temen is also among  the Woolf Foundation's 2020 Krill Award winners for young Israeli researchers. Dr.Teman is looking now for candidates for PhD and Post-Doc positions. Please contact him at adam.teman@biu.ac.il 

Dr. Adam Teman Research IC Tapeouts

• 2019 - SoC2 System-on-Chip (TSMC 16FFC)
• 2018 - Kwak Gain Cell eDRAM T(Samsung 28nm FD-SOI)
• 2017 - Martini Gain Cell eDRAM (ST 28nm FD-SOI)
• 2016 - BEER Gain Cell eDRAM (ST 28nm FD-SOI)
• 2016 - DAFNA Gain Cell eDRAM (TSMC 28nm)

[PhD] Printed Inorganic Materials Electronics

Circuit Design and Compact Modeling in Printed Electronics Based on Inorganic Materials

PhD Dissertation

Gabriel Cadilha Marques

Veröffentlicht am 30.04.2020

DOI: 10.5445/IR/1000118801

Abstract - The goal of this thesis is therefore to develop an inorganic printed electronics technology with corresponding modeling methodologies to capture device behavior for industry standard circuit simulators as well as circuit designs as building blocks for future applications. To reduce the high supply voltage requirements (~5V) in PE, alternative gating approaches for FETs are considered. One approach is to replace the dielectric with an electrolyte. Due to the formation of a Helmholtz double layer (HDL), a FET with a high gate-capacitance (~5 μFcm-2) is expected, reducing the voltage requirements to ~1V. By combining the indium oxide channel with the electrolyte-gating approach, high performance devices with low voltage requirements are available in PE.

[PhD] Compact DC Modeling of Tunnel-FETs

Compact DC Modeling of Tunnel-FETs

November 2019

PhD Thesis of Fabian Horst 

Doctor Advisor: Profs. Benjamin Iniguez and Alexander Kloes

Abstract - In the last decade, the tunnel field-effect transistor (TFET) has gained a lot of interest and is handled as a possible successor of the conventional MOSFET technology. The current transport of a TFET is based on the band-to-band (B2B) tunneling mechanism and therefore, the subthreshold slope at room temperature can overcome the limit of 60 mV/dec. In order to describe and analyze the TFET behavior in circuit simulations, this dissertation introduces a compact DC model for double-gate TFETs. The modeling approach considers the B2B tunneling and the parasitic effect of trap-assisted tunneling (TAT) in the ON- and AMBIPOLAR-state of the TFET. It includes a 2D compact potential equation package to de-scribe the band diagram of the TFET. Based on the band diagram, the B2B tunneling and TAT current part are derived separately. In order to do so, firstly a compact expression for the tunneling length is found, which is then used together with a numerical robust Wentzel-Kramers-Brillouin (WKB) approach to calculate the tunneling probability. Afterwards, using Landauer’s tunneling equation, the tunneling generation rate is calculated and approximated to come to a closed-form expression for the current density. Further approximation of the current density by a mathematical function, compact expressions for the resulting B2B tun-neling and TAT current are achieved. The verification of the model is done with the help of TCAD Sentaurus simulation data for various simulation setups. Furthermore, the validity of the model is proven by measurements of fabricated complementary TFETs. In order to demonstrate the numerical stability and continuity as well as the flexibility, simulations of TFET-based logic circuits like a single-stage inverter or an SRAM cell are performed and analyzed. The combination of the DC model with an TFET AC model allows for a transient simulation of an 11-stage ring oscillator. 

Fig: 2D sketch of the n-type DG TFET device geometry, showing the channel thickness t ch , the channel length l ch , the gate oxide thickness tox and the length of the S/D region l sd . Source (S) and drain (D) region are highly p/n-doped with a doping concentration N s/d 

URL: http://hdl.handle.net/10803/668957

PhD Positions at Institute for Microelectronics/TU Wien

PhD Positions
on Characterization, Modeling and Circuit Simulation in Microelectronics
Institute for Microelectronics/TU Wien

The Institute for Microelectronics is a world leading research institute focused on the reliability of circuit components (especially transistors). In addition to conventional Si transistors, the behavior of SiC devices designed for high-power applications is also at the center of interest. The broad field of research conducted at the Institute of Microelectronics ranges from characterization, physical modeling and ab-initio simulations to compact modeling and circuit simulation. For the characterization of transistors, the Institute for Microelectronics has a modern laboratory equipped with commercial and custom-built measurement instruments. To explain the experimental data, elaborate physical models are developed and constantly improved. The models are directly incorporated into state-of-the-art device simulators, i.e. MinimosNT and Comphy. To perform computationally expensive simulations a modern computer cluster is while for circuit simulations Cadence and Synopsis spice simulators are available.

The institute is currently looking for highly talented and motivated young researchers to join the team in one of the following areas:

• Physical modeling of silicon-carbide transistors
• Single-defect characterization of low-noise silicon transistors
• Development of custom-made measurement instruments
• Circuit simulations using advanced implementation of reliability models in Verilog-A for SPICE

For the positions knowledge in one or more of the following areas is advantageous to complement our team:

• C/C++ and Python
• Semiconductor device physics
• Circuit simulation
• Implementation of new compact/physical models
• Handling of device/circuit simulators
• Design of discrete analog circuits and hardware/software solutions
• Wafer probers and instruments for microelectronics
• Keithley instruments and scripting language LUA
• Measurement techniques in microelectronics (MSM, C(V), DLTS, charge pumping etc.)

As a teaching institution, knowledge transfer and close cooperation with students are very importance. The applicants should like to work together with students and supervise Master’s and Bachelor theses.

Starting Date: As soon as possible

Salary: Three-year positions (40hours/week) are in accordance with the salary regulations of the Austrian Science Fund. The gross annual salary is approximately EUR 40,300

Application Material: Please provide a detailed CV, your collective certificates, your Master’s thesis (weblink or PDF), and a single-page motivation letter (discussing relevant previous experience related to the desired skills and experiences) and summarize your motives for joining us.

Application: Please submit your application to jobs@iue.tuwien.ac.at.

Application Deadline: The positions will remain open until filled.

Open PhD/PostDoc positions at the University of Pisa

device and 2D materials modeling, analog circuit design, 

power electronics, wireless sensors design

We are in the process of opening a few positions for PhD students and for Post Docs at the University of Pisa, in the fields of modeling of nanoscale electron devices, 2D materials, analog circuit design, power electronics design and wireless sensors for harsh environments. We are now asking for expressions of interest from perspective candidates.

I would be very grateful if you could forward this information to whom you think could be interested in applying.

Expressions of interest must be submitted by email, together with a CV and contact information by 31 Dec 2019 to giuseppe.iannaccone@unipi.it.

The available research topics are listed below. They are typically performed in the framework of a larger project within a European collaboration or of a bilateral project with an industrial sponsor.

1. Theoretical investigation of ultra-low-power nanoscale transistors and memories for large scale integrated circuits. This will include devices based on heterostructures of 2D materials. We are looking for candidates with strong background in Electrical Engineering and/or Physics.

2. Quantum engineering of materials and devices based on heterostructures of 2D materials. This activity is based on materials modeling with quantum chemistry methods and quantum transport modeling. We are looking for candidates with strong background in Physical Chemistry and/or Physics.

3. Design of low-power analog integrated circuits for analog hardware  accelerators of artificial intelligence (deep learning) algorithms and for new computing architectures. We are looking for candidates with strong background in Electrical Engineering.

4. Design of low-power mixed signal circuits for security hardware, such as physical unclonable functions and hardware security signatures. We are looking for candidates with strong background in Electrical Engineering.

5. Modeling of power devices based on GaN and SiC for performance and reliability optimization and model development. We are looking for candidates with strong background in Electrical Engineering and/or in Physics.

6. Design of highly efficient power management circuits and systems based on switched capacitors. Both circuits based on silicon technology, on SiC and on GaN will be considered. We are looking for candidates with strong background in Electrical Engineering.

PhD positions are for three years, Post Doc positions are initially for one year and might be renewed for up to four years. Positions of shorter duration (for visiting students/scholars or for MS  thesis projects) might be considered depending on the expertise of the candidate and the definition of a suitable subproject.

For additional information and specific information on the projects, please send an email to
Prof. Giuseppe Iannaccone
giuseppe.iannaccone@unipi.it

Writing a science/tech book, is it that hard?

Writing a science/tech book, is it that hard?

As a microwave engineer Errikos Lourandakis, PhD, a senior R&D engineer at Helic Inc., started with RF device characterization while working on his PhD. He got fascinated about it and gradually devoted much of his time in the lab (see his lab pic below), though RF and Microwave Measurements were just a vehicle for microwave circuit design that was his actual PhD topic. After 10+ years in academia and industry, recently he has also published his new book "On-Wafer Microwave Measurements and De-embedding"

Errikos' RF and mm-Wave Measurement Lab

Is it worth it? [read more...]