Feb 10, 2022

[paper] Special Topic on Materials and Devices for 5G Electronics

Nathan D. Orloff1, Rick Ubic2, and Michael Lanagan3
Special topic on materials and devices for 5G electronics
Appl. Phys. Lett. 120, 060402 (2022); 
DOI: 10.1063/5.0079175
1 NIST, Colorado, USA
2 Boise State University, Idaho, USA
3 Penn State University, Pennsylvania, USA

Abstract: Next generation communications are inspiring entirely new applications in education, healthcare, and transportation. These applications are only possible because of improvements in latency, data rates, and connectivity in the latest generation. Behind these improvements are new materials and devices that operate at much higher frequencies than ever before, a trend that is likely to continue. Beyond these exciting applications, higher frequency millimeter waves (mmWaves) may also address a growing problem with capacity. Today, most capacity problems occur when large numbers of wireless connections or applications access the network at the same time at any single location. As wireless internet connections far surpass wired connections and wireless data usage has grown exponentially for more than 10 years,3 many believe that capacity problems will spread without access to new bandwidth.

FIG: A plot of the peak data rates vs the operating frequency 
where the diameter of the circle is the bandwidth.

Acknowledgement: Our [the editors] special thanks to Lesley Cohen, Editor-in-Chief, Susan Trolier-McKinstry, Associate Editor, and Jessica Trudeau and Emma Nicholson Van Burns for their technical assistance with publishing.


Feb 9, 2022

[paper] SPICE simulation of PIN diodes and IGBT devices

Manhong Zhang, Yi Zhai
Recovering the carrier number conservation in SPICE simulation of PIN diodes and IGBT devices
Solid-State Electronics
Available online 7 February 2022, 108239
DOI: 10.1016/j.sse.2022.108239
   
North China Electric Power University, Beijing 102206, China


Abstract: In SPICE simulations of PIN diodes and IGBT devices using finite difference method, one discretizes an undepleted N- region into several equally spaced nodes with a time-dependent distance of Δx(t). Then transforms the ambipolar diffusion equation, a time-space partial differential equation, into a set of time-dependent ordinary differential equations. However, the time-dependent property of Δx(t) destroys the carrier number conservation. In this paper, we propose an approach to account for the effect of the Δx(t) by introducing an auxiliary system. It has the same total current and the total carrier number in the undepleted N- region as the real system, but has different electron and hole current components. The difference is caused by adding compensation current terms with the equal amplitude and opposite sign to the electron and hole current terms in the auxiliary system. These compensation current terms are proportional to the boundary speed of the undepleted N- region and do not change the total current. The auxiliary system can be easily solved using SPICE behavior models and its carrier density is a good approximation to the real one. Our simulations show that the compensation current correction is important for fast switching PIN diodes, but may not be very important in IGBT devices due to their large gate-related capacitance.
FIG: SPICE simulation model of PIN diodes and IGBT devices

[book] Nano Interconnects: Device Physics, Modeling and Simulation

Afreen Khursheed and Kavita Khare
Nano Interconnects: Device Physics, Modeling and Simulation
CRC Press; 1st edition (2021)
ISBN: ‎ 978-0367610487

This textbook comprehensively covers on-chip interconnect dimension and application of carbon nanomaterials for modeling VLSI interconnect and buffer circuits. It provides analysis of ultra-low power high speed nano-interconnects based on different facets such as material modeling, circuit modeling and the adoption of repeater insertion strategies and measurement techniques. It covers important topics including on-chip interconnects, interconnect modeling, electrical impedance modeling of on-chip interconnects, modeling of repeater buffer and variability analysis. Pedagogical features including solved problems and unsolved exercises are interspersed throughout the text for better understanding. Aimed at senior undergraduate and graduate students in the field of electrical engineering, electronics and communications engineering for courses on Advanced VLSI Interconnects, Advanced VLSI Design, VLSI Interconnects, VLSI Design Automation and Techniques, this book:

  • Provides comprehensive coverage of fundamental concepts related to nanotube transistors and interconnects.
  • Discusses properties and performance of practical nanotube devices and related applications.
  • Covers physical and electrical phenomena of carbon nanotubes, as well as applications enabled by this nanotechnology.
  • Discusses the structure, properties, and characteristics of graphene-based on-chip interconnect.
  • Examines interconnect power and interconnect delay issues arising due to downscaling of device size.

Feb 8, 2022

[App Note] Frenetic use A.I. technology to design optimal transformers

Frenetic is a power electronics company created with the goal of making magnetics simple. Frenetic is revolutionizing the world of magnetics with A.I. technology, which is replacing the need for outdated engineering methods. The A.I. technology allows designing optimal transformers and inductors, build and test samples in our laboratory and get the best manufacturing solutions for our clients in order to ensure that quality and timelines are respected.

App Note: Planar Transformer with Half Turns

New proposed solution for the transformer was based on a 4-column structure, where the flux cancellations reduce the core losses and allow keeping high power density. The solution was used in an LLC converter, obtaining a power density of 55 W/cm3.

References
[1] Y. -C. Liu et al., "Design and Implementation of a Planar Transformer With Fractional Turns for High Power Density LLC Resonant Converters," in IEEE Transactions on Power Electronics, vol. 36, no. 5, pp. 5191-5203, May 2021, doi: 10.1109/TPEL.2020.3029001.
[2] D. Huang, S. Ji and F. C. Lee, "LLC resonant converter with matrix transformer", IEEE Trans. Power Electron., vol. 29, no. 8, pp. 4339-4347, Aug. 2014.
[3] C. Fei, F. C. Lee and Q. Li, "High-efficiency high-power-density LLC converter with an integrated planar matrix transformer for high-output current applications", IEEE Trans. Ind. Electron., vol. 64, no. 11, pp. 9072-9082, Nov. 2017.

[paper] Atomic-scale defects in Si/SiO2 transistors

Stephen J. Moxim1, Fedor V. Sharov1, David R. Hughart2, Gaddi S. Haase2, Colin G. McKay2, and Patrick M. Lenahan1
Atomic-scale defects generated in the early/intermediate stages of dielectric breakdown in Si/SiO2 transistors
Appl. Phys. Lett. 120, 063502 (2022);
DOI:10.1063/5.0077946
   
1 The Pennsylvania State University, USA
2 Sandia National Laboratories, New Mexico, USA


Abstract: Electrically detected magnetic resonance and near-zero-field magnetoresistance measurements were used to study atomic-scale traps generated during high-field gate stressing in Si/SiO2 MOSFETs. The defects observed are almost certainly important to time-dependent dielectric breakdown. The measurements were made with spin-dependent recombination current involving defects at and near the Si/SiO2 boundary. The interface traps observed are Pb0 and Pb1 centers, which are silicon dangling bond defects. The ratio of Pb0/Pb1 is dependent on the gate stressing polarity. Electrically detected magnetic resonance measurements also reveal generation of E′ oxide defects near the Si/SiO2 interface. Near-zero-field magnetoresistance measurements made throughout stressing reveal that the local hyperfine environment of the interface traps changes with stressing time; these changes are almost certainly due to the redistribution of hydrogen near the interface.

FIG: Atomic-scale picture of defect formation and hydrogen motion during the early and intermediate stages of SiO2 degradation and breakdown.

Acknowledgements: This work was supported by the Defense Threat Reduction Agency (DTRA) under Award No. HDTRA1-18-0012. The content of the information does not necessarily reflect the position or the policy of the federal government and no official endorsement should be inferred