[book] Negative Capacitance Field Effect Transistors

Negative Capacitance Field Effect Transistors

Physics, Design, Modeling and Applications

Edited By Young Suh Song, Shubham Tayal, Shiromani Balmukund Rahi, Abhishek Kumar Upadhyay

Pages 63 Color & 7 B/W Illustrations

ISBN 9781032445311 176 Sept. 29, 2023 by CRC Press

Description

This book aims to provide information in the ever-growing field of low-power electronic devices and their applications in portable device, wireless communication, sensor, and circuit domains. Negative Capacitance Field Effect Transistor: Physics, Design, Modeling and Applications, discusses low-power semiconductor technology and addresses state-of-art techniques such as negative-capacitance field-effect transistors and tunnel field-effect transistors. The book is broken up into four parts. Part one discusses foundations of low-power electronics including the challenges and demands and concepts like subthreshold swing. Part two discusses the basic operations of negative-capacitance field-effect transistor (NC-FET) and Tunnel Field-effect Transistor (TFET). Part three covers industrial applications including cryogenics and biosensors with NC-FET. This book is designed to be one-stop guidebook for students and academic researchers, to understand recent trends in the IT industry and semiconductor industry. It will also be of interest to researchers in the field of nanodevices like NC-FET, FinFET, Tunnel FET, and device-circuit codesign.

Table of Contents

Chapter 1 Recent Challenges in IT and Semiconductor Industry: From Von Neumann Architecture to the Future

Young Suh Song, Shiromani Balmukund Rahi, Navjeet Bagga, Sunil Rathore, Rajeewa Kumar Jaisawal, P. Vimala, Neha Paras, K. Srinivasa Rao

Chapter 2 Technical Demands of Low-Power Electronics

Soha Maqbool Bhat, Pooran Singh, Ramakant Yadav, Shiromani Balmukund Rahi, Billel Smaani, Abhishek Kumar Upadhyay, Young Suh Song

Chapter 3 Negative capacitance Field Effect Transistors: Concept and Technology

Ball Mukund Mani Tripathi

Chapter 4 Basic Operation Principle of Negative Capacitance Field Effect Transistor

Malvika, Bijit Choudhuri, Kavicharan Mummaneni

Chapter 5 Basic Operational Principle of Anti-ferroelectric Materials and Ferroelectric Materials

Umesh Chandra Bind, Shiromani Balmukund Rahi

Chapter 6 Basic Operation Principle of Optimized NCFET: Amplification Perspective

S. Yadav, P.N Kondekar, B. Awadhiya

Chapter 7 Spin Based Magnetic Devices With Spintronics

Asif Rasool, Shahnaz kossar, R.Amiruddin

Chapter 8 Mathematical Approach for Future Semiconductor Roadmap

Shiromani Balmukund Rahi,Abhishek Kumar Upadhyay, Young Suh Song, Nidhi Sahni, Ramakant Yadav, Umesh Chandra Bind,Guenifi Naima,Billel Smaani,Chandan Kumar Pandey,Samir Labiod, T.S. Arun Samul,Hanumanl Lal, H. Bijo Josheph

Chapter 9 Mathematical Approach for Foundation of Negative Capacitance Technology

Shiromani Balmukund Rahi,Abhishek Kumar Upadhyay, Young Suh Song, Nidhi Sahni, Ramakant Yadav, Umesh Chandra Bind,Guenifi Naima,Billel Smaani,Chandan Kumar Pandey,Samir Labiod, T.S. Arun Samul,Hanumanl Lal, H. Bijo Josheph

FOSS Circuit Simulators

AN OPEN-SOURCE, FREE CIRCUIT SIMULATOR

by: Bryan Cockfield on July 30, 2023

The original circuit simulation software, called the Simulation Program with Integrated Circuit Emphasis, or SPICE as it is more commonly known, was originally developed at the University of Califorina Berkeley in the 1970s with an open-source license. That’s the reason for the vast versions of SPICE available now decades after the original was released, not all of which are as open or free as we might like [1].

Fig: The Quite Universal Circuit Simulator includes a GUI based on the Qt toolkit and handles ad and ac analysis, S-parameters, harmonic balance analysis, noise analysis, and so forth. 

We’ve [2] listed all the simulators we found - the good, the bad, and the ugly - that actually did perform circuit simulation in some fashion. They are provided alphabetically, along with the most notable benefits and drawbacks we uncovered.

REF:
[1] An Open-Source, Free Circuit Simulator by Bryan Cockfield on July 30, 2023
[2] Best free analog circuit simulators by Lee Teschler on January 26, 2022

[book] Organic and Inorganic Light Emitting Diodes

Organic and Inorganic Light Emitting Diodes
Reliability Issues and Performance Enhancement

Edited By T.D. Subash, J. Ajayan, W. Grabinski

ISBN 9781032375175 1st Edition (C) 2023
198 Pages 106 B/W Illustrations
Published June 19, 2023 by CRC Press

Description

This book covers a comprehensive range of topics on the physical mechanisms of LEDs (light emitting diodes), scattering effects, challenges in fabrication and efficient enhancement techniques in organic and inorganic LEDs. It deals with various reliability issues in organic/inorganic LEDs like trapping and scattering effects, packaging failures, efficiency droops, irradiation effects, thermal degradation mechanisms, and thermal degradation processes.

Chapter 1: Fundamental Physics of Light Emitting Diodes: Organic

and Inorganic Technology; Deboraj Muchahary, Sagar Bhattarai, Arvind Sharma and Ajay Kumar Mahato

Chapter 2: Physical Mechanisms That Limit the Reliability of LEDs; Tulasi Radhika Patnala, N. Hemalatha, Sankararao Majji and M. Sundar Rajan

Chapter 3: Scattering Effects on the Optical Performance of LEDs; Vinodhini Subramaniyam, B. A. Saravanan and Moorthi Pichumani

Chapter 4: Challenges in Fabrication and Packaging of LEDs; Nesa Majidzadeh and Hossein Movla

Chapter 5: Opportunities and Challenges in Flexible and Organic LED; Shalu C.

Chapter 6: Light Extraction Efficiency Improvement Techniques in Light-Emitting Diodes; M. Manikandan, G. Dhivyasri, D. Nirmal, Joseph Anthony Prathap and Binola K. Jebalin I. V.

Chapter 7: Efficiency Enhancement Techniques in Flexible and Organic Light-Emitting Diodes; J. Ajayan and T. D. Subash

Chapter 8: Performance Enhancement of Light Emitting Radiating Dipoles (LERDs) Using Surface Plasmon-Coupled and Photonic Crystal-Coupled Emission Platforms; Seemesh Bhaskar and Sai Sathish Ramamurthy

[paper] THz FET Modeling

Adam Gleichman¹, Kindred Griffis¹, and Sergey V. Baryshev^1,2

Useful Circuit Analogies to Model THz Field Effect Transistors

arXiv:2307.07488v1 [physics.app-ph] 14 Jul 2023

1) Department of Electrical and Computer Engineering, Michigan State University, USA
2) Department of Chemical Engineering and Materials Science, Michigan State University, USA

Anstract: The electron fluid model in plasmonic field effect transistor (FET) operation is related to the behavior of a radio-frequency (RF) cavity. This new understanding led to finding the relationships between physical device parameters and equivalent circuit components in traditional parallel resistor, inductor, and capacitor (RLC) and transmission models for cavity structures. Verification of these models is performed using PSpice to simulate the frequency dependent.

FIG: RLC Lumped THz FET Model

[paper] artificial synapse

Md. Hasan Raza Ansari, Udaya Mohanan Kannan, and Nazek El-Atab

Silicon Nanowire Charge Trapping Memory for Energy-Efficient Neuromorphic Computing

IEEE Transactions on Nanotechnology (2023)

DOI 10.1109/TNANO.2023.3296673

SAMA Labs, CEMSE Division, KAUST, Thuwal 23955-6900, Saudi Arabia

Department of Electronic Engineering, Gachon University, Seongnam 13120, Korea

Abstract: This work highlights the utilization of the floating body effect and charge-trapping/de-trapping phenomenon of a Silicon-nanowire (Si-nanowire) charge-trapping memory for an artificial synapse of neuromorphic computing application. Charge trapping/de-trapping in the nitride layer characterizes the long-term potentiation (LTP)/depression (LTD). The accumulation of holes in the potential well achieves short-term potentiation (STP) and controls the transition from STP to LTP. Also, the transition from STP to LTP is analyzed through gate length scaling and high-κ material (Al2O3) for blocking oxide. Furthermore, the conductance values of the device are utilized for system-level simulation. System-level hardware parameters of a convolutional neural network (CNN) for inference applications are evaluated and compared to a static random-access memory (SRAM) device and charge-trapping memory. The results confirm that the Si-nanowire transistor with better gate controllability has a high retention time for LTP states, consumes low power, and archives better accuracy (91.27%). These results make the device suitable for low-power neuromorphic applications.

FIG: Schematic representation of biological and Si-nanowire charge trapping memory as an artificial synapse