[VIRTUAL] EDS MQ on Compact Modeling

VIRTUAL MINI-COLLOQUIUM ON COMPACT MODELING

IEEE EDS Compact Modeling Technical Committee

EDS Spain Chapter

Department of Electronic, Electrical and Automatic Control Engineering, 

University Rovira I Virgili, Tarragona (Spain)

December 17, 2020 EDS MQ Program (times in CET)
	10:20-10:30 Benjamin Iñiguez, IEEE EDS MQ Chair Department of Electronic, Electrical and Automatic Control Engineering, University Rovira I Virgili, Tarragona (Spain) Opening session
	10:30-11:15 Yogesh. S Chauhan Department of Electrical Engineering, Indian Institute of Technology Kanpur (India) “BSIM-BULK and BSIM-HV: Industry Standard SPICE Models for Analog, RFand High Voltage Applications”
	11:15-12:00 Manoj Saxena Department of Electronics, University of Delhi  (India) “Modeling and Simulation of Robust Ultrasensitive Tunnel Field Effect Transistor Design for Biosensing Applications”
	12·00-12:45 Wladek Grabinski GMC, Commugny (Switzerland) “FOSS TCAD/EDA Tools for Semiconductor Device Modeling”
	12:45-13:30 Arokia Nathan Darwin College, University of Cambridge (UK) “Physics-Based Parameter Extraction for TFTs”
	13:30-15:00 Break
	15:00-15:45 Marcelo Pavanello Department of Electrical Engineering, Centro Universitario FEI, Sao Bernardo do Campo (Brazil) "Quantum Effects on the Mobility of SOI Nanowire MOSFETs Induced by the Active Substrate Bias"
	15:45-16:30 Michael S. Shur Department of Electrical, Systems and Computer Engineering, Rensselaer Polytechnic Institute, Troy NY (USA) “THz Compact SPICE/ADS model”
	16:30-17:15 Edmundo Gutiérrez Department of Electronics, INAOE, Puebla (Mexico) "RF MOSFET degradation modeling up to 67 GHz”
	End of EDS MQ

[2nd Day Photos] 13th International MOS-AK Workshop

13th International MOS-AK Workshop was organized jointly with THM Giessen who has provided ZOOM meeting platform for the online event. 50+ registered participants have attended 2nd day with two further MOS-AK sessions and followed 7 technical talks

MOS-AK session III - 11:00 - 14:00 (PST) on Dec.11, 2020
Chair: Anurag Mangla; Semtech Neuchatel (CH)

[8] Statistical Analysis of MOSFET extracted parameters for n-MOS mismatch modeling.

Juan Pablo Martinez Brito

CEITEC SA/UFRGS (BR)

[9] Rapid multiscale simulation of nanoscale MOSFETs: Is an interplay between compact models and NEGF possible?

Alexander Kloes

NanoP, THM University of Applied Sciences (D)

[10] The Effect of Non Rectangular MOS Channels in Modelling High Voltage Lateral MOS

Marco Sambi, Lorenzo Labate, Simona Cozzi, Nicola Holzer

STMicroelectronics (I)

MOS-AK session IV
Chair: Daniel Tomaszewski, Lukasiewicz - IMiF, Warsaw (PL)

[11] Nonlinear Embedding Model for the Accelerated Design of PAs with the ASM-HEMT model

Patrick Roblin*, Miles Lindquist*, Nicholas Miller+ and Marek Mierzwinski^

*The Ohio State University, AFRL+, Keysight Corp.^ (USA)

[12] New analytical model for AOSTFTs

Antonio Cerdeira, Yoanlys Hernandez-Barrios, Magali Estrada, Benjamin Iniguez

CINVESTAV (MX) and URV (SP)

[13] Unifying the Modeling of Charge Trapping in RTN, 1/f Noise and BTI

Gilson Wirth

UFRGS (BR)

[14] SPICE Modeling for Display Technologies

Bogdan Tudor

Silvaco (USA)

MOS-AK attendees group photo of 2nd MOS-AK workshop day:

MOS-AK attendees group photo (1)

MOS-AK attendees group photo (2)

[1st Day Photos] 13th International MOS-AK Workshop

13th International MOS-AK Workshop was organized jointly with THM Giessen who has provided ZOOM meeting platform for the online event. More than 50 registered participants have attended two MOS-AK sessions and followed 7 technical talk during its first day.

MOS-AK session I - 11:00 - 14:00 (PST) on Dec.10, 2020
Chair: Laurie E. Calvet; CNRS-University Paris-Saclay (F)

[1] Material Growth, Characterization of III-V & II-VI Compound Semiconductors and its Use for Various Device Applications

Saxena Praveen Kumar

Tech Next Lab Pvt Ltd (IN)

[2] Contact-controlled transistors: Device characteristics and modelling challenges

Radu Sporea

Uni. Surrey (UK)

[3] Contact-controlled transistors: Specific applications and opportunities

Eva Bestelink

Uni. Surrey (UK)

MOS-AK session II
Chair: Larry Nagel; Omega Enterprises Consulting (USA)

[4] 90 Years of Twoport Matrices and its Impact on Device Measurements and Modeling

Franz Sischka

SisConsult Engineering Office (D)

[5] Some issues on the high-frequency compact modeling of CMOS transistors and related devices

Roberto Murphy

INAOE (MX)

[6] VAMPyRE: Verilog-A Model Pythonic Rule Enforcer

Geoffrey Coram

Analog Devices, Inc. (USA)

[7] Simulate 40X Faster with SmartSpice HPP

Jody Matos

Silvaco (USA)

MOS-AK attendees group photo of 1st MOS-AK workshop day:

MOS-AK attendees group photo (1)

MOS-AK attendees group photo (2)

IEEE Connecting Experts

Dear IEEE Young Professionals,
as part of our IEEE Connecting Experts program, together with IEEE Croatia Section, we are bringing you a panel about design thinking in STEM area and project-based education through interdisciplinary teams, going beyond engineering, to prepare students for the marketplace. The technical talk entitled "Interdisciplinary Project-based Learning" is organized in collaboration with IEEE Croatia Section and is starting tomorrow, December 11 at 15:10 UTC.

MS Teams details
You can join the session here.

About the topic
In this interactive session, the development, design, and implementation of an interdisciplinary project-based learning approach at the WSU will be presented and discussed by the team who designed it and tested its performance. The project called SOAR (STEM-Oriented Alliance for Research) offers a transformative educational experience to students, merging coursework across three different academic disciplines. Science, Technology, Engineering, and Math (STEM) education has been challenged by industries to incorporate business and communication experiences (and vice versa) that prepare students for the workplace. Incorporating interdisciplinary project-based coursework provides experiential learning for students, a skillset that employers indicate as desirable.
The data obtained during the work on the SOAR project suggest that the collaboration in interdisciplinary project-based learning does initially produce disorientation, some trepidation, and confusion. However, ultimately these disorienting dilemmas lead to transformative learning, increased confidence, and cohesion among disciplines. The results of this paper will inform and guide engineering educators in creating interdisciplinary project-based coursework that meets the growing demands of the workplace of today and the future.
To engage in the interactive part of the session, you will need the link: www.pollev.com/jmurray180
All this project, and this Workshop, really is about is how to make students engage their full creativity potentials and make learning more interesting and, ultimately, useful and applicable in the fast-changing economy and society. 

About the speakers

It is our pleasure to host a wonderful team of professors from the Washington State University, Everett:

• Prof. Lucrezia Cuen Paxson, Clinical Assistant Professor, Edward E. Murrow College of Communication,
• Dr. Mark Beattie, Associate Vice Chancellor for Academic Affairs and Clinical Assistant Professor in the School of Hospitality Business Management,
• Dr. Jacob Murray, Clinical Assistant Professor and Program Coordinator for the School of Electrical Engineering and Computer Science,
• Dr. Soobin Seo, Assistant Professor of hospitality business management at the WSU Everett.

LinkedIn links: Lucrezia Cuen Paxson, Jacob Murray, Soobin Seo, Mark Beattie

You can check our real-time schedule of talks in the IEEE Connecting Experts Calendar and follow us and our live streams on our Facebook page or YouTube channel.  

Kind regards,

Dubravko Sabolic - IEEE Croatia Section

Vinko Lesic - IEEE Region 8 Young Professionals

[Foreword] Special Issue on Compact Modeling of Semiconductor Devices

Foreword

Special Issue on Compact Modeling of Semiconductor Devices

DOI: 10.1109/JEDS.2020.3039023

THIS Special Issue is dedicated to recent research in the field of compact modeling of semiconductor devices. This is the first J-EDS Special Issue on compact modeling. In the last years, a number of new semiconductor device structures, for electronic and photonic applications, have been developed. Compact models are needed for the incorporation of these new devices in integrated circuits. Therefore, a Special Issue was needed to present recent compact modeling solutions for semiconductor devices

A total of 8 regular papers and 2 invited papers have been accepted in this Special Issue. All papers, including the invited ones, were subjected to a thorough peer reviewing. A high number of reviewers participated in this process. This has resulted in a Special Issue containing very high-quality papers.  The published papers target compact modeling aspects for a wide number of devices, such as SiGe HBTs, IGBTs, SiC SB diodes, LDMOSFETs, Multi-Gate MOSFETs, RRAMs, TFET SRAMs, and organic TFTs. Open source Verilog-A compil- ing is also targeted by one paper. Different operation regimes and conditions are addressed: charging/discharging, THz, high power, tunneling radiation environments, . . . 

One invited paper, by U. Sharma and S. Mahapatra, addresses the modeling of HCD Kinetics for full VG/VD span under different experimental conditions across architectures and its SPICE implementation The other invited paper, by Fregonese et al., presents a review of THz characterization and modeling of SiGE HBTs.

I [BJ] would like to thank the work done by the rest of the Editors of this Special Issue and also by all the reviewers who participated in this process. And of course, I want to thank all the authors for their interest in submitting papers to this Special Issue. Thanks to authors, reviewers, and editors, this high-quality Special Issue has been possible.

BENJAMIN IÑIGUEZ, Guest Editor-in-Chief Department of Electronic, Electrical and Automatic Control Engineering University Rovira i Virgili 43007 Catalonia, Spain YOGESH SINGH CHAUHAN, Guest Associate Editor Department of Electrical Engineering Indian Institute of Technology Kanpur Kanpur 208016, India SLOBODAN MIJALKOVIC, Guest Associate Editor Simulation Group EDA Division Silvaco Europe Ltd. Cambridgeshire PE27 5JL, U.K. KEJUN XIA, Guest Associate Editor Department of Front End Innovation NXP Semiconductors Chandler, AZ 85224 USA

JUNG-SUK GOO, Guest Associate Editor Department of Compact Model Development GLOBALFOUNDRIES Inc. Santa Clara, CA 95054 USA MARCELO PAVANELLO, Guest Associate Editor Department of Electrical Engineering Centro Universitario FEI 09850-901 São Bernardo do Campo, Brazil MAREK MIERZWINSKI, Guest Associate Editor Department of PathWave Software and Solutions Keysight Technologies Santa Rosa, CA 95403 USA (e-mail: ) WLADEK GRABINSKI, Guest Associate Editor Department of Research and Development Modelling GMC Consulting 1291 Commugny, Switzerland