2nd Announcement and C4P
Topics to be covered include the following among other related to the compact/SPICE modeling and its Verilog-A standardization:
- Compact Modeling (CM) of the electron devices
- Advances in semiconductor technologies and processing
- Verilog-A language for CM standardization
- New CM techniques and extraction software
- Open Source (FOSS) TCAD/EDA modeling and simulation
- CM of passive, active, sensors and actuators
- Emerging Devices, Organic TFT, CMOS and SOI-based memory
- Microwave, RF device modeling, high voltage device modeling
- Nanoscale CMOS, BiCMOS, SiGe, GaN, InP devices and circuits
- Technology R&D, DFY, DFT and reliability/aging IC designs
- Foundry/Fabless Interface Strategies (eg: Skywater 130nm CMOS)
List of MOS-AK speakers (tentative in alphabetical order) :
- Sergio Bampi, UFRGS (BR)
- Juan Brito, IMPINJ (BR)
- Antonio Cerdeira, CINVESTAV (MX)
- Benjamin Iniguez, URV (SP)
- Roberto Murphy, INAOE (MX)
- Jean-Michel Sallese, EPFL (CH)
- Gilson I Wirth, UFRGS (BR)
Important Dates:
- Call for Papers: Dec. 2021
- 2nd Announcement: May 2022
- Final Workshop Program: June 2022
- MOS-AK: July 3 2022, Puebla (MX)
- 8:30am - 12:30pm (UTC/GMT -5 hours) MOS-AK Workshop
WG170522
No comments:
Post a Comment