Seunghyun Son, Taejun Ha, Taeyoung Nam, Yoonyoung Chung, Sunmean Kim
Bayesian Optimization–Reinforcement Learning Hybrid Framework for a-IGZO Thin-Film Transistor Compact Model Parameter Extraction in 2T0C Dynamic Random Access Memory Applications
Advanced Intelligent Systems (2026): e70525
1.) School of Electronic and Electrical Engineering, Kyungpook National University, Daegu, Republic of Korea
2.) Department of Electrical Engineering, POSTECH, Pohang, Republic of Korea
Abstract: In this work, we propose a two-stage BO–RL hybrid framework for compact model parameter extraction of a-IGZO TFTs. The strategy combines the complementary strengths of Bayesian optimization (BO) and reinforcement learning (RL): BO performs global exploration and provides an optimized starting point, and RL conducts local refinement within a reduced search domain. Experimental results demonstrate that the hybrid method substantially improves extraction efficiency while maintaining fitting accuracy statistically comparable to that of BO or RL alone. Across five independent random seeds under an equal 4000-simulation budget, the fitting quality of BO–RL is statistically comparable to that of BO, while RL alone remains an order of magnitude less sample-efficient; the RL refinement stage requires no surrogate refitting, so its per-simulation cost remains low and constant, and the framework attains comparable fitting quality without the growing optimization overhead of BO. We validate the framework using an a-IGZO TFT compact model, showing good agreement between SPICE-simulated and measured C–V/I–V curves with the extracted parameters. Circuit-level transient simulations of an a-IGZO 2T0C cell demonstrate write/hold operations with a retention time of 172 s.
FIG: Schematic of a-IGZO TFT structure and fabrication process;
SPICE (lines) simulation and experimental data (points) comparison
Acknowledgments: This paper was a result of the research project supported by SK Hynix Inc.
Funding MDUO004A
